Datasheet > TTRN012G73XE1

TTRN012G73XE1

更新时间： 2024-01-17 00:49:51

品牌	Logo	应用领域
杰尔 - AGERE		复用器电信集成电路信息通信管理异步传输模式 ATM 时钟
页数	文件大小	规格书
22页	369K
描述
TTRN012G5 (2.5 Gbits/s) and TTRN012G7 (2.5 Gbits/s and 2.7 Gbits/s) Clock Synthesizer, 16:1 Data Multiplexer

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TTRN012G73XE1 技术参数

生命周期：	Active	包装说明：	FQFP,
Reach Compliance Code：	compliant	HTS代码：	8542.39.00.01
风险等级：	5.82	JESD-30 代码：	R-PQFP-G128
JESD-609代码：	e0	长度：	19.86 mm
功能数量：	1	端子数量：	128
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	FQFP
封装形状：	RECTANGULAR	封装形式：	FLATPACK, FINE PITCH
峰值回流温度（摄氏度）：	225	认证状态：	Not Qualified
标称供电电压：	3.3 V	表面贴装：	YES
技术：	BICMOS	电信集成电路类型：	ATM/SONET/SDH SUPPORT CIRCUIT
温度等级：	INDUSTRIAL	端子面层：	TIN LEAD
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	13.89 mm	Base Number Matches：	1

TTRN012G73XE1 数据手册

Preliminary Data Sheet

August 2000

TTRN012G5 (2.5 Gbits/s) and TTRN012G7 (2.5 Gbits/s and 2.7 Gbits/s)

Clock Synthesizer, 16:1 Data Multiplexer

Features

Description

■ TTRN012G5 supports OC-48/STM-16 data rate

The Lucent Technologies Microelectronics Group

TTRN012G5 operates at the OC-48/STM-16 data

rate of 2.5 Gbits/s. The TTRN012G7 device operates

at either 2.5 Gbits/s or the RS FEC OC-48/STM-16

data rate of 2.7 Gbits/s. For clarity, this data sheet

refers to the TTRN012G5 serial data rate as

2.5 Gbits/s and the parallel data and reference clock

frequency as 155 MHz. (The precise rates are

2.48832 Gbits/s and 155.52 MHz.) When using the

TTRN012G7 at the FEC rate, the 2.5 Gbits/s data

rate should be interpreted as 2.7 Gbits/s and the par-

allel and clock frequency should be interpreted as

166 MHz. (The precise rates are 2.66606 Gbits/s and

166.62 MHz.)

■ TTRN012G7 supports:

— OC-48/STM-16 data rate

— RS (255, 239) forward error correction (FEC)

OC-48/STM-16 data rate

■ Fully integrated clock synthesizer and 16:1 data

multiplexer

■ Supports clockless data transfer into the 16:1

multiplexer

■ Parity checking and valid data indication

■ Data inversion option

■ Additional high-speed CML serial data output for

The devices provide a 16:1 multiplexer and clock

multiplier unit. Both a high-speed serial clock and

data output are generated. The devices accept 16

differential PECL data inputs and a low-speed refer-

ence clock. A unique feature of the multiplexer is that

no clock is required to feed in the 16 data lines, as

long as the upstream data chip clock is synchronous

with the device REFCLKP/N input.

system loopback

■ Loss of lock indication

■ Single 3.3 V supply

■ Available in either MBIC 025 BiCMOS technology

or lower-power MBIC 025 silicon germanium

BiCMOS technology

■ LVPECL 155.52 Mbits/s digital I/O

Alternatively, contra-clocking may be used, whereby

the device provides one of four phases of a

155.52 MHz or 166.62 MHz clock output back

upstream to the data chip.

■ Jitter generation and jitter transfer compliant with

the following:

— Telcordia Technologies* GR-253

— ITU-T G.825

Other features include a parity bit input and parity

check on the 16 input data lines, a second

— ITU-T G.958

2.5 Gbits/s or 2.7 Gbits/s data output for loopback

toward the TRCV012G5 or TRCV012G7 device, and

a user-configurable PLL bandwidth. Both devices are

available in either BiCMOS or in SiGe BiCMOS tech-

nology for lower power operation.

Applications

■ SONET/SDH line origination equipment

■ SONET/SDH add/drop multiplexers

■ SONET/SDH cross connects

■ SONET/SDH test equipment

■ Digital video transmission

* Telcordia Technologies is a registered trademark of Bell Com-

munications Research, Inc.

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