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TPSM84203 PDF预览

TPSM84203

更新时间: 2024-02-03 10:43:25
品牌 Logo 应用领域
德州仪器 - TI 电源电路
页数 文件大小 规格书
26页 1052K
描述
1.5A、28V 输入、3.3V 输出 TO-220 电源模块

TPSM84203 技术参数

是否无铅: 不含铅是否Rohs认证: 不符合
生命周期:Active包装说明:,
Reach Compliance Code:compliantECCN代码:EAR99
Factory Lead Time:1 week风险等级:1.87
模拟集成电路 - 其他类型:SWITCHING REGULATOR控制技术:PULSE WIDTH MODULATION
最大输入电压:28 V最小输入电压:4.5 V
标称输入电压:24 VJESD-30 代码:R-XSMA-T3
长度:10 mm功能数量:1
端子数量:3最高工作温度:125 °C
最低工作温度:-40 °C最大输出电流:1.5 A
最大输出电压:3.3 V最小输出电压:3.3 V
标称输出电压:3.3 V封装主体材料:UNSPECIFIED
封装形状:RECTANGULAR封装形式:MICROELECTRONIC ASSEMBLY
峰值回流温度(摄氏度):NOT SPECIFIED座面最大高度:11.1 mm
表面贴装:NO切换器配置:BUCK
最大切换频率:510 kHz技术:HYBRID
温度等级:AUTOMOTIVE端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:SINGLE
处于峰值回流温度下的最长时间:NOT SPECIFIEDBase Number Matches:1

TPSM84203 数据手册

 浏览型号TPSM84203的Datasheet PDF文件第2页浏览型号TPSM84203的Datasheet PDF文件第3页浏览型号TPSM84203的Datasheet PDF文件第4页浏览型号TPSM84203的Datasheet PDF文件第6页浏览型号TPSM84203的Datasheet PDF文件第7页浏览型号TPSM84203的Datasheet PDF文件第8页 
TPSM84203, TPSM84205, TPSM84212  
www.ti.com.cn  
ZHCSGE1A JULY 2017REVISED AUGUST 2017  
6.4 Thermal Information  
TPSM842xx  
THERMAL METRIC(1)  
EAB  
3 PINS  
56  
UNIT  
(2)  
RθJA  
ψJT  
Junction-to-ambient thermal resistance  
°C/W  
°C/W  
°C/W  
(3)  
Junction-to-top characterization parameter  
0.9  
(4)  
ψJB  
Junction-to-board characterization parameter  
1.7  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics paper.  
(2) The junction-to-ambient thermal resistance, RθJA, applies to devices soldered directly to a 50 mm × 50 mm double-sided PCB with 2 oz.  
copper and natural convection cooling. Additional airflow reduces RθJA  
.
(3) The junction-to-top characterization parameter, ψJT, estimates the junction temperature, TJ, of a device in a real system, using a  
procedure described in JESD51-2A (sections 6 and 7). TJ = ψJT × Pdis + TT; where Pdis is the power dissipated in the device and TT is  
the temperature of the top of the controller IC.  
(4) The junction-to-board characterization parameter, ψJB, estimates the junction temperature, TJ, of a device in a real system, using a  
procedure described in JESD51-2A (sections 6 and 7). TJ = ψJB × Pdis + TB; where Pdis is the power dissipated in the device and TB is  
the temperature of the module board 1 mm from the controller IC.  
6.5 Electrical Characteristics  
Over -40°C to +85°C free-air temperature range, VIN = 24 V, IOUT = IOUT max, FSW = 400 kHz, CIN = 0.1µF, 50V ceramic; 10µF,  
50V ceramic; 100µF, 35V electrolytic, and COUT = 2 x 47µF, 16V 1210 ceramic (unless otherwise noted)  
PARAMETER  
INPUT VOLTAGE (VIN)  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
TPSM84203  
4.5(1)  
7(1)  
14.5(1)  
28  
28  
V
V
V
V
V
VIN  
Input voltage range  
Over VOUT range  
TPSM84205  
TPSM84212  
28  
VIN increasing  
VIN decreasing  
4.1  
3.6  
4.4  
VIN_UVLO  
VIN under voltage lock out  
3.3  
OUTPUT VOLTAGE (VOUT)  
TPSM84203  
TPSM84205  
TPSM84212  
3.3  
5.0  
V
V
V
Output voltage  
Over IOUT range  
12.0  
VOUT  
Set-point voltage tolerance  
Temperature variation(2)  
TA = 25°C, IOUT = 0 A  
–40°C TA 85°C, IOUT = 0 A  
Over VIN range, IOUT = 1 A  
Over IOUT range  
–3%  
+3%  
0.4%  
0.4%  
0.5%  
15  
Line regulation  
Load regulation  
Output voltage ripple  
20 MHz bandwidth, peak-to-peak, IOUT > 500 mA  
mV  
OUTPUT CURRENT  
Output current  
Overcurrent threshold  
PERFORMANCE  
See SOA graph for derating over temperature.  
0
1.5  
A
A
IOUT  
3.1  
VIN = 5 V, IOUT = 1 A  
VIN = 12 V, IOUT = 1 A  
VOUT = 3.3 V  
VOUT = 3.3 V  
VOUT = 5.0 V  
VOUT = 3.3 V  
VOUT = 5.0 V  
VOUT = 12.0 V  
92%  
91%  
92%  
87%  
90%  
94%  
ƞ
Efficiency(3)  
VIN = 24 V, IOUT = 1 A  
VOUT  
over/undershoot  
1 A/µs load step,  
25% to 75% IOUT(max),  
COUT= 94 µF  
4%  
VOUT  
µs  
Transient response(2)  
Recovery time  
100  
(1) The minimum input voltage is the lowest ensured voltage that will produce the nominal output voltage. See the Drop-Out Voltage section  
for information on drop-out voltage.  
(2) Specified by design. Not production tested.  
(3) See the efficiency graphs in the Typical Characteristics section for efficiency over the entire load range.  
Copyright © 2017, Texas Instruments Incorporated  
5

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