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TPS65192 PDF预览

TPS65192

更新时间: 2024-09-29 07:04:51
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德州仪器 - TI 转换器电平转换器栅极
页数 文件大小 规格书
25页 1650K
描述
9-Channel Level Shifter With Gate Voltage Shaping and Discharge Functions

TPS65192 数据手册

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TPS65192  
www.ti.com ....................................................................................................................................................................................................... SLVS962JULY 2009  
9-Channel Level Shifter With Gate Voltage Shaping and Discharge Functions  
A tenth level shifter channel specially configured with  
1
FEATURES  
a
comparator input stage allows designers to  
implement panel discharging during power-down.  
9-Channel Level Shifter Supports 6 × CLK,  
VST, ODD, and EVEN Signals  
Organized as Two Groups of 7 + 2 Channels  
BLOCK DIAGRAM  
Separate Positive Supplies (VGHX) for Each  
Group  
FLK1  
FLK2  
VGHX Levels up to 38V  
VGL Levels Down to –13V  
VGH1  
FLK3  
Panel DISCHARGE Function  
RE  
Suitable for 4-Phase and 6-Phase Applications  
Gate Voltage Shaping on Channels 1 to 6  
Supports Single and Multiple Flicker Clocks  
Peak Output Currents greater than 500mA  
28-Pin 5×5 mm QFN Package  
IN1  
IN2  
OUT1  
OUT2  
OUT3  
IN3  
IN4  
OUT4  
OUT5  
IN5  
APPLICATIONS  
LCD Displays Using Gate-in-Panel (GIP)  
Technology  
IN6  
OUT6  
OUT7  
IN7  
DESCRIPTION  
-
VSENSE  
DISCHARGE  
VGL  
VREF  
+
The TPS65192 is a 9 channel level-shifter intended  
for use in LCD display applications such as TVs and  
monitors. The device converts the logic-level signals  
generated by the Timing Controller (T-CON) to the  
high-level signals used by the display panel.  
GND  
VGH2  
IN8  
IN9  
OUT8  
OUT9  
The 9 level shifter channels are organized as two  
groups. Channels 1 through 7 are powered from VGH1  
and VGL, and channels 8 and 9 are powered from  
VGH2 and VGL. Each level-shifter channel features low  
impedance output stages that achieve fast rise and  
fall times even when driving the capacitive loading  
typically present in LCD display applications.  
Level shifter channels 1 through 6 support gate  
voltage shaping, which can be used to improve  
picture quality by reducing image sticking. Novel  
decoding logic enables a single flicker clock signal to  
control gate voltage shaping for all CLK channels  
without the need for synchronization. The device also  
supports the use of multiple flicker clocks. The rate of  
decay is set by an external resistor or resistor  
network connected to the RE pin.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2009, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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