TPS62000-HT
SLVS917A–MARCH 2009–REVISED JUNE 2009.......................................................................................................................................................... www.ti.com
DETAILED DESCRIPTION
Operation
The TPS62000 is a step down converter operating in a current mode PFM/PWM scheme with a typical switching
frequency of 750 kHz.
At moderate to heavy loads, the converter operates in the pulse width modulation (PWM) and at light loads the
converter enters a power save mode (pulse frequency modulation) to keep the efficiency high.
In the PWM mode operation, the part operates at a fixed frequency of 750 kHz. At the beginning of each clock
cycle, the high side P-channel MOSFET is turned on. The current in the inductor ramps up and is sensed via an
internal circuit. The high side switch is turned off when the sensed current causes the PFM/PWM comparator to
trip when the output voltage is in regulation or when the inductor current reaches the current limit (set by ILIM).
After a minimum dead time preventing shoot through current, the low side N-channel MOSFET is turned on and
the current ramps down again. As the clock cycle is completed, the low side switch is turned off and the next
clock cycle starts.
In discontinuous conduction mode (DCM), the inductor current ramps to zero before the end of each clock cycle.
In order to increase the efficiency the load comparator turns off the low side MOSFET before the inductor current
becomes negative. This prevents reverse current flowing from the output capacitor through the inductor and low
side MOSFET to ground that would cause additional losses.
As the load current decreases and the peak inductor current does not reach the power save mode threshold of
typically 120 mA for more than 15 clock cycles, the converter enters a pulse frequency modulation (PFM) mode.
In the PFM mode, the converter operates with:
•
•
•
Variable frequency
Constant peak current that reduces switching losses
Quiescent current at a minimum
Thus maintaining the highest efficiency at light load currents. In this mode, the output voltage is monitored with
the error amplifier. As soon as the output voltage falls below the nominal value, the high side switch is turned on
and the inductor current ramps up. When the inductor current reaches the peak current of typical: 150 mA +
50 mA/V × (VI – VO), the high side switch turns off and the low side switch turns on. As the inductor current
ramps down, the low side switch is turned off before the inductor current becomes negative which completes the
cycle. When the output voltage falls below the nominal voltage again, the next cycle is started.
The converter enters the PWM mode again as soon as the output voltage can not be maintained with the typical
peak inductor current in the PFM mode.
The control loop is internally compensated reducing the amount of external components.
The switch current is internally sensed and the maximum current limit can be set to typical 600 mA by connecting
ILIM to ground; or, to typically 1.2 A by connecting ILIM to VIN.
100% Duty Cycle Operation
As the input voltage approaches the output voltage and the duty cycle exceeds typical 95%, the converter turns
the P-channel high side switch continuously on. In this mode, the output voltage is equal to the input voltage
minus the voltage drop across the P-channel MOSFET.
Synchronization, Power Save Mode and Forced PWM Mode
If no clock signal is applied, the converter operates with a typical switching frequency of 750 kHz. It is possible to
synchronize the converter to an external clock within a frequency range from 500 kHz to 1000 kHz. The device
automatically detects the rising edge of the first clock and is synchronizes immediately to the external clock. If
the clock signal is stopped, the converter automatically switches back to the internal clock and continues
operation without interruption. The switch over is initiated if no rising edge on the SYNC pin is detected for a
duration of four clock cycles. Therefore, the maximum delay time can be 8 µs in case the internal clock has a
minimum frequency of 500 kHz.
In case the device is synchronized to an external clock, the power save mode is disabled and the device stays in
forced PWM mode.
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