TPS3836E18-EP / J25-EP / H30-EP / L30-EP / K33-EP
TPS3837E18-EP / J25-EP / L30-EP / K33-EP
TPS3838E18-EP / J25-EP / L30-EP / K33-EP
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SGLS322C–MAY 2006–REVISED AUGUST 2006
Electrical Characteristics (continued)
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
TA = 25°C
220
500
VDD > VIT, VDD < 3 V
VDD > VIT, VDD > 3 V
VDD < VIT
TA = Full range
TA = 25°C
600
nA
250
10
550
IDD
Supply current
TA = Full range
TA = 25°C
650
25
µA
30
TA = Full range
Internal pullup resistor at MR
Input capacitance at MR, CT
33
5
kΩ
CI
VI = 0 V to VDD
pF
Timing Requirements
RL = 1 MΩ, CL = 50 pF, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP UNIT
At VDD
VIH = VIT + 0.2 V, VIL = VIT – 0.2 V
6
1
µs
µs
tw
Pulse width
At MR
VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD
Switching Characteristics
RL = 1 MΩ, CL = 50 pF, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
CT = GND
CT = VDD
5
10
200
10
15
V
DD ≥ VIT + 0.2 V, MR = 0.7 × VDD
,
td
Delay time
ms
See timing diagram
Propagation (delay)
VDD to RESET delay VIL = VIT – 0.2 V, VIH = VIT + 0.2 V
tPHL time, high- to low-level (TPS3836,
µs
VIL = 1.6 V
50
10
50
output
TPS3838)
Propagation (delay)
tPLH time, low- to high-level
output
VIL = VIT – 0.2 V, VIH = VIT + 0.2 V
VIL = 1.6 V
VDD to RESET delay
(TPS3837)
µs
µs
µs
Propagation (delay)
MR to RESET delay
tPHL time, high- to low-level (TPS3836,
V
DD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD
DD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD
0.3
0.3
output
TPS3838)
Propagation (delay)
tPLH time, low- to high-level
output
MR to RESET delay
(TPS3837)
V
7
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