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TNY277GN PDF预览

TNY277GN

更新时间: 2024-02-06 06:47:52
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT 开关光电二极管PC
页数 文件大小 规格书
24页 1604K
描述
Energy Efficient, Off-Line Switcher with Enhanced Flexibility and Extended Power Range

TNY277GN 技术参数

是否Rohs认证:符合生命周期:Active
零件包装代码:DIP包装说明:DIP, DIP7/8,.3
针数:8Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:14 weeks风险等级:0.87
Samacsys Confidence:4Samacsys Status:Released
Samacsys PartID:532717Samacsys Pin Count:8
Samacsys Part Category:Power SupplySamacsys Package Category:Dual-In-Line Packages
Samacsys Footprint Name:PDIP-8C (P Package)_1Samacsys Released Date:2017-09-02 09:36:16
Is Samacsys:N模拟集成电路 - 其他类型:SWITCHING REGULATOR
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:2.6 V最小输入电压:1.8 V
标称输入电压:2.2 VJESD-30 代码:R-PDIP-T7
JESD-609代码:e3长度:9.575 mm
功能数量:1端子数量:7
最高工作温度:125 °C最低工作温度:-40 °C
最大输出电流:0.481 A封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP7/8,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
子类别:Power Management Circuits最大供电电流 (Isup):0.46 mA
表面贴装:NO切换器配置:SINGLE
最大切换频率:140 kHz温度等级:AUTOMOTIVE
端子面层:Matte Tin (Sn)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

TNY277GN 数据手册

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TNY274-280  
MOSFET is controlled by this pin. MOSFET switching is  
terminated when a current greater than a threshold current is  
drawn from this pin. Switching resumes when the current being  
pulled from the pin drops to less than a threshold current. A  
modulation of the threshold current reduces group pulsing. The  
threshold current is between 60 µA and 115 µA.  
maximum duty cycle signal (DCMAX) and the clock signal that  
indicates the beginning of each cycle.  
The oscillator incorporates circuitry that introduces a small  
amount of frequency jitter, typically 8 kHz peak-to-peak, to  
minimize EMI emission. The modulation rate of the frequency  
jitter is set to 1 kHz to optimize EMI reduction for both average  
and quasi-peak emissions. The frequency jitter should be  
measured with the oscilloscope triggered at the falling edge of  
the DRAIN waveform. The waveform in Figure 4 illustrates  
the frequency jitter.  
TheEN/UVpinalsosenseslineunder-voltageconditionsthrough  
an external resistor connected to the DC line voltage. If there is  
noexternalresistorconnectedtothispin, TinySwitch-IIIdetects  
its absence and disables the line under-voltage function.  
SOURCE (S) Pin:  
Enable Input and Current Limit State Machine  
This pin is internally connected to the output MOSFET source  
for high voltage power return and control circuit common.  
The enable input circuit at the EN/UV pin consists of a low  
impedance source follower output set at 1.2 V. The current  
through the source follower is limited to 115 µA. When the  
current out of this pin exceeds the threshold current, a low  
logic level (disable) is generated at the output of the enable  
circuit, until the current out of this pin is reduced to less than  
the threshold current. This enable circuit output is sampled  
at the beginning of each cycle on the rising edge of the clock  
signal. If high, the power MOSFET is turned on for that cycle  
(enabled). If low, the power MOSFET remains off (disabled).  
Since the sampling is done only at the beginning of each cycle,  
subsequent changes in the EN/UVpin voltage or current during  
the remainder of the cycle are ignored.  
TinySwitch-III Functional  
Description  
TinySwitch-IIIcombinesahighvoltagepowerMOSFETswitch  
withapowersupplycontrollerinonedevice.Unlikeconventional  
PWM (pulse width modulator) controllers, it uses a simple  
ON/OFF control to regulate the output voltage.  
Thecontrollerconsistsofanoscillator,enablecircuit(senseand  
logic), current limit state machine, 5.85 V regulator, BYPASS/  
MULTI-FUNCTIONpinunder-voltage,overvoltagecircuit,and  
current limit selection circuitry, over- temperature protection,  
current limit circuit, leading edge blanking, and a 700 V power  
MOSFET. TinySwitch-III incorporates additional circuitry for  
line under-voltage sense, auto-restart, adaptive switching cycle  
on-time extension, and frequency jitter. Figure 2 shows the  
functional block diagram with the most important features.  
The current limit state machine reduces the current limit by  
discrete amounts at light loads when TinySwitch-III is likely to  
switch in the audible frequency range. The lower current limit  
raises the effective switching frequency above the audio range  
andreducesthetransformeruxdensity,includingtheassociated  
audible noise. The state machine monitors the sequence of  
enable events to determine the load condition and adjusts the  
current limit level accordingly in discrete amounts.  
Oscillator  
The typical oscillator frequency is internally set to an average  
of 132 kHz. Two signals are generated from the oscillator: the  
Undermostoperatingconditions(exceptwhenclosetono-load),  
the low impedance of the source follower keeps the voltage on  
the EN/UV pin from going much below 1.2 V in the disabled  
state. This improves the response time of the optocoupler that  
is usually connected to this pin.  
600  
500  
VDRAIN  
400  
5.85 V Regulator and 6.4 V Shunt Voltage Clamp  
The 5.85 V regulator charges the bypass capacitor connected  
to the BYPASS pin to 5.85 V by drawing a current from the  
voltage on the DRAIN pin whenever the MOSFET is off. The  
BYPASS/MULTI-FUNCTIONpinistheinternalsupplyvoltage  
node. When the MOSFET is on, the device operates from the  
energy stored in the bypass capacitor. Extremely low power  
consumption of the internal circuitry allows TinySwitch-III to  
operate continuously from current it takes from the DRAIN  
pin. A bypass capacitor value of 0.1 µF is sufficient for both  
high frequency decoupling and energy storage.  
300  
200  
100  
0
136 kHz  
128 kHz  
0
5
10  
Time (µs)  
Figure 4. Frequency Jitter.  
E
2/06  
3

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