Datasheet > TM4EP72BJB

TM4EP72BJB

更新时间： 2024-02-19 07:55:32

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
13页	248K
描述
EXTENDED-DATA-OUT BUFFERED DYNAMIC RAM MODULES

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TM4EP72BJB 数据手册

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SMMS686A − AUGUST 1997 − REVISED FEBRUARY 1998

Organization . . . 4194304 × 72 Bits

Single 3.3-V Power Supply

( 10% Tolerance)

Long Refresh Periods:

− TM4EP72CxB: 64 ms (4096 Cycles)

− TM4EP72BxB: 32 ms (2048 Cycles)

3-State Output

JEDEC 168-Pin Dual-In-Line Memory

Module (DIMM) With Buffer for Use With

Socket

Extended-Data-Out (EDO) Operation With

CAS-Before-RAS (CBR), RAS-Only, and

Hidden Refresh

TM4EP72xxB-xx — Uses Eighteen 16M-Bit

High-Speed (4M×4-Bit) Dynamic Random

Access Memories (DRAMs)

Ambient Temperature Range

0°C to 70°C

High-Speed, Low-Noise LVTTL Interface

Gold-Plated Contacts

High-Reliability Plastic 26-Lead

Performance Ranges

300-Mil-Wide Surface-Mount Small-Outline

J-Lead (SOJ) Package (DJ Suffix) and

26-Lead 300-Mil-Wide Surface-Mount Thin

ACCESS ACCESS ACCESS EDO

TIME

TIME CYCLE

HPC

RAC

CAC

Small-Outline Package (TSOP) (DGA Suffix)

(MAX)

50 ns

60 ns

70 ns

(MAX)

13 ns

15 ns

18 ns

(MAX)

25 ns

30 ns

35 ns

(MIN)

20 ns

25 ns

30 ns

’4EP72xxB-50

’4EP72xxB-60

’4EP72xxB-70

Intended for Workstation/Server

Applications

description

The TM4EP72BxB is a 32M-byte, 168-pin, buffered, dual-in-line memory module (DIMM). The DIMM is

composed of eighteen TMS427409A, 4194304 × 4-bit 2K refresh EDO DRAMs, each in a 300-mil, 26-lead

plastic TSOP (DGA suffix) or SOJ package (DJ suffix), and two SN74LVT162244 16-bit buffers, each in a

48-lead plastic TSOP mounted on a substrate with decoupling capacitors. See the TMS427409A data sheet

(literature number SMKS893).

The TM4EP72CxB is a 32M-byte, 168-pin, buffered DIMM. The DIMM is composed of eighteen TMS426409A,

4194304 × 4-bit 4K refresh EDO DRAMs, each in a 300-mil, 26-lead plastic TSOP (DGA suffix) or SOJ package

(DJ suffix), and two 16-bit buffers mounted on a substrate with decoupling capacitors. See the TMS427409A

data sheet (literature number SMKS893).

These modules are intended for multimodule workstation/server applications where buffering is needed for

address and control signals. Two copies of address 0 (A0 and B0) are defined to allow maximum performance

for 4-byte applications which interleave between two 4-byte banks. A0 is common to the DRAMs used for

DQ0−DQ31, while B0 is common to the DRAMs used for DQ32−DQ63.

operation

The TM4EP72xxB operates as eighteen TMS42x409As that are connected as shown in the TM4EP72xxB

functional block diagram.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

12 3 4 5 6 7...13

中文翻译

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与TM4EP72BJB相关器件

型号	品牌	获取价格	描述	数据表
TM4EP72BJB-50	TI	获取价格	4MX72 EDO DRAM MODULE, 50ns, DMA168, DIMM-168
TM4EP72BJB-60	TI	获取价格	4MX72 EDO DRAM MODULE, 60ns, DMA168, DIMM-168
TM4EP72BJB-70	TI	获取价格	4MX72 EDO DRAM MODULE, 70ns, DMA168, DIMM-168
TM4EP72BJN	TI	获取价格	EXTENDED-DATA-OUT DYNAMIC RAM MODULES
TM4EP72BJN-50	TI	获取价格	EXTENDED-DATA-OUT DYNAMIC RAM MODULES
TM4EP72BJN-60	TI	获取价格	EXTENDED-DATA-OUT DYNAMIC RAM MODULES
TM4EP72BJN-70	TI	获取价格	EXTENDED-DATA-OUT DYNAMIC RAM MODULES
TM4EP72BPN	TI	获取价格	EXTENDED-DATA-OUT DYNAMIC RAM MODULES
TM4EP72BPN-50	TI	获取价格	EXTENDED-DATA-OUT DYNAMIC RAM MODULES
TM4EP72BPN-60	TI	获取价格	EXTENDED-DATA-OUT DYNAMIC RAM MODULES

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