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TLV5625IDR PDF预览

TLV5625IDR

更新时间： 2024-11-20 01:02:19
品牌 Logo 应用领域
德州仪器 - TI 光电二极管转换器
页数 文件大小 规格书
15页 195K
描述
2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN

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中文翻译

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TLV5625IDR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, SOP8,.25针数：8
Reach Compliance Code：compliantFactory Lead Time：1 week
风险等级：5.16最大模拟输出电压：2.6 V
最小模拟输出电压：转换器类型：D/A CONVERTER
输入位码：BINARY输入格式：SERIAL
JESD-30 代码：R-PDSO-G8JESD-609代码：e4
长度：4.9 mm最大线性误差 (EL)：0.1953%
湿度敏感等级：1位数：8
功能数量：1端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP8,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：3/5 V认证状态：Not Qualified
采样速率：0.093 MHz座面最大高度：1.75 mm
最大稳定时间：10 µs标称安定时间 (tstl)：3 µs
子类别：Other Converters最大压摆率：2.3 mA
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：3.91 mm
Base Number Matches：1

TLV5625IDR 数据手册

 浏览型号TLV5625IDR的Datasheet PDF文件第2页浏览型号TLV5625IDR的Datasheet PDF文件第3页浏览型号TLV5625IDR的Datasheet PDF文件第4页浏览型号TLV5625IDR的Datasheet PDF文件第5页浏览型号TLV5625IDR的Datasheet PDF文件第6页浏览型号TLV5625IDR的Datasheet PDF文件第7页 
TLV5625  
2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG  
CONVERTER WITH POWER DOWN  
SLAS233A – JULY 1999 – REVISED MARCH 2000  
features  
applications  
Dual 8-Bit Voltage Output DAC  
Programmable Internal Reference  
Digital Servo Control Loops  
Digital Offset and Gain Adjustment  
Industrial Process Control  
Programmable Settling Time  
– 2.5 µs in Fast Mode  
– 12 µs in Slow Mode  
Machine and Motion Control Devices  
Mass Storage Devices  
Compatible With TMS320 and SPI Serial  
Ports  
D PACKAGE  
(TOP VIEW)  
Differential Nonlinearity <0.2 LSB Max  
Monotonic Over Temperature  
DIN  
SCLK  
CS  
V
DD  
OUTB  
REF  
1
2
3
4
8
7
6
5
description  
The TLV5625 is a dual 8-bit voltage output DAC  
with a flexible 3-wire serial interface. The serial  
interface is compatible with TMS320, SPI ,  
OUTA  
AGND  
QSPI , and Microwire  
serial ports. It is  
programmed with a 16-bit serial string containing  
4 control and 8 data bits.  
The resistor string output voltage is buffered by an x2 gain rail-to-rail output buffer. The buffer features a  
Class-AB output stage to improve stability and reduce settling time. The programmable settling time of the DAC  
allows the designer to optimize speed versus power dissipation.  
Implemented with a CMOS process, the device is designed for single supply operation from 2.7 V to 5.5 V. It  
is available in an 8-pin SOIC package in standard commercial and industrial temperature ranges.  
AVAILABLE OPTIONS  
PACKAGE  
T
A
SOIC  
(D)  
0°C to 70°C  
TLV5625CD  
TLV5625ID  
–40°C to 85°C  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SPI and QSPI are trademarks of Motorola, Inc.  
Microwire is a trademark of National Semiconductor Corporation.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

中文翻译

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TLV5625IDR 替代型号

型号 品牌 替代类型 描述 数据表
TLV5625CD TI

类似代替

 2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN 
TLV5625CDR TI

类似代替

 暂无描述
TLV5625ID TI

类似代替

 2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN 

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