Datasheet > THS1215_15

THS1215_15

更新时间： 2022-10-12 16:36:21

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
22页	760K
描述
3.3-V, 12-BIT, 15 MSPS, LOW-POWER ANALOG-TO-DIGITAL

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THS1215_15 数据手册

Not Recommended For New Designs

THS1215

www.ti.com

SLAS292A–MARCH 2001–REVISED MARCH 2004

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range, T_A(unless otherwise noted)

MIN

NOM

MAX UNIT

POWER SUPPLY

Supply voltage

AV_DD

DV_DD

3.0

3.3

3.6

ANALOG AND REFERENCE INPUTS

V_REFT

Reference input voltage

V_REFB

f_CLK= 5 MHz to 15 MHz

CON1 = 0, CON0 = 1

CON1 = 1, CON0 = 0

2.0

1.05

0.95

–1.0

–2.0

2.15

1.15

1.0

2.5

1.3

Reference voltage differential, V_REFT– V_REFB

1.05

1.0

Analog input voltage differential, (AIN+) – (AIN–)⁽¹⁾

2.0

Analog input capacitance, C_i

Clock input⁽²⁾

AV_DD

DIGITAL OUTPUTS

Minimum digital output load resistance, R_L

Maximum digital output load capacitance, C_i

DIGITAL INPUTS

100

kΩ

High-level input voltage, V_IH

Low-level input voltage, V_IL

2.4

DGND

DV_DD

0.8

(3)

Clock frequency, f_CLK, See Note

MHz

Clock pulse duration, t_W(CLKL), t_W(CLKH)

Operating free-air temperature, T_A

f_CLK= 15 MHz

TH1215

33.3

36.7

°C

TJ1215

–40

(1) Based on V_REFT– V_REFB= 1.0 V, varies proportional to the V_REFT– V_REFBvalue. AIN+ and AIN– inputs must always be greater than 0 V

and less than AV_DD

(2) Clock pin is referenced to AGND and powered by AV_DD

(3) Clock frequency can be extended to this range without degradation of performance.

1 2 345 6 7...22

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