Not Recommended For New Designs
THS1215
www.ti.com
SLAS292A–MARCH 2001–REVISED MARCH 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION
PRODUCT
PACKAGE-
LEAD
PACKAGE
SPECIFIED
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
DESIGNATOR(1) TEMPERATURE
RANGE
THS1215
THS1215
THS1215
THS1215
THS1215
THS1215
THS1215
THS1215
TSSOP-28
TSSOP-28
TSSOP-28
TSSOP-28
SOP-28
PW
PW
PW
PW
DW
DW
DW
DW
0°C TO 70°C
0°C TO 70°C
–40°C TO 85°C
–40°C TO 85°C
0°C TO 70°C
0°C TO 70°C
–40°C TO 85°C
–40°C TO 85°C
TH1215
TH1215
TJ1215
TJ1215
TH1215
TH1215
TJ1215
TJ1215
THS1215 CPW
THS1215 CPWR
THS1215 IPW
THS1215 IPWR
THS1215 CDW
THS1215 CDWR
THS1215 IDW
THS1215 IDWR
Tube, 50
Tape and reel, 2000
Tube, 50
Tape and reel, 2000
Tube, 20
SOP-28
Tape and reel, 1000
Tube, 20
SOP-28
SOP-28
Tape and reel, 1000
(1) For the most current specifications and package information refer to our Web site at www.ti.com.
FUNCTIONAL BLOCK DIAGRAM
DV
DD
CLK
Timing Circuitry
OVRNG
D[11:0]
AIN+
AIN−
3-State
Output
Buffers
Sample
and Hold
12-Bit ADC
OE
Configuration
Control
CON0
CON1
Circuit
Internal
Reference
Circuit
EXTREF
REFB
REFT
AGND DGND
AV
DD
2