Datasheet > THD3027027FB280005-8.192M

THD3027027FB280005-8.192M

更新时间： 2023-02-26 13:44:33

品牌	Logo	应用领域
PLETRONICS		/
页数	文件大小	规格书
6页	672K
描述
CMOS Output Clock Oscillator, 8.192MHz Nom, LCC, 4 PIN

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THD3 Series

PLETRONICS

STRATUM-III TYPE TCXO / TCVCXO

Mechanical Dimensions

Inches

0.197 ± 0.008 5.00 ± 0.20

0.126 ± 0.008 3.20 ± 0.20

0.059 max

0.055

1.50 max

1.40

D¹

E¹

F¹

G¹

H¹

J¹

0.031

0.80

0.043

1.10

0.102

2.60

0.020C

0.008R

0.50C

0.20R

¹Typical dimensions

Pad Layout mm shown (Top View)

Disclaimer: Recommended layout shown.

Adjust pad layout as needed for individual

process requirements.

Solder mask required, as shown.

(Not to Scale)

Contacts (pads): Gold 11.8 to 39.4 µinches (0.3 to 1.0 µm) over Nickel 50 to 350 µinches (1.27 to 8.89 µm)

Layout

Pad Function

Note

Vcontrol Input

Ground (GND)

Output

If this function is not specified, recommend connecting this pad to ground. EFC (Electronic Frequency Control).

CMOS

V_CCSupply Voltage

N.C.

Connect an appropriate 10nF power supply bypass capacitor as close as possible

All other pads on the bottom shall not be connected.

These are internally connected for the TCXO compensation process

All connection points in the designated region have solder mask cover to avoid any electrical connections

(top view shown)

For Optimum Jitter Performance, Pletronics recommends:

A ground plane under the device

Do not route large transient signals (both current and voltage) under the device

Do not place near a large magnetic field such as a high frequency switching power supply

Do not place near piezoelectric buzzers or mechanical fans

Minimize air flow across the device

Product information is current as of publication date. The product conforms to specifications per the terms of the Pletronics standard warranty.

Production processing does not necessarily include testing of all parameters.

Aug 27, 2019 Rev. E

Pg 3

1 234 5 6

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