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TC74VCX162841FT_07

更新时间: 2024-10-02 04:02:03
品牌 Logo 应用领域
东芝 - TOSHIBA 锁存器
页数 文件大小 规格书
12页 226K
描述
Low-Voltage 20-Bit D-Type Latch with 3.6-V Tolerant Inputs and Outputs

TC74VCX162841FT_07 数据手册

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TC74VCX162841FT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VCX162841FT  
Low-Voltage 20-Bit D-Type Latch with 3.6-V Tolerant Inputs and Outputs  
The TC74VCX162841FT is a high-performance CMOS 20-bit  
D-type latch. Designed for use in 1.8-V, 2.5-V or 3.3-V systems, it  
achieves high-speed operation while maintaining the CMOS low  
power dissipation.  
It is also designed with overvoltage tolerant inputs and outputs  
up to 3.6 V.  
The TC74VCX162841FT can be used as two 10-bit latches or one  
20-bit latch. The 20 latches are transparent D-type latches. The  
device has noninverting data (D) inputs and provides true data at  
its outputs. While the latch-enable (1LE or 2LE) input is high,  
the Q outputs of the corresponding 10-bit latch follow the D  
Weight: 0.25 g (typ.)  
inputs. When LE is taken low, the Q outputs are latched at the  
levels set up at the D inputs. When the OE input is high, the outputs are in a high-impedance state. This device is  
designed to be used with 3-state memory address drivers, etc.  
The 26-series resistor helps reducing output overshoot and undershoot without external resistor.  
All inputs are equipped with protection circuits against static discharge.  
Features  
26-series resistors on outputs  
Low-voltage operation: V = 1.8 to 3.6 V  
CC  
High-speed operation: t = 3.9 ns (max) (V  
= 3.0 to 3.6 V)  
= 2.3 to 2.7 V)  
= 1.8 V)  
pd  
CC  
CC  
CC  
: t = 4.8 ns (max) (V  
pd  
: t = 9.6 ns (max) (V  
pd  
Output current: I /I  
= ±12 mA (min) (V  
= 3.0 V)  
OH OL  
CC  
: I /I  
= ±8 mA (min) (V  
= ±4 mA (min) (V  
= 2.3 V)  
= 1.8 V)  
OH OL  
CC  
CC  
: I /I  
OH OL  
Latch-up performance: 300 mA  
ESD performance:Machine model ≥ ±200 V  
Human body model ≥ ±2000 V  
Package: TSSOP  
3.6-V tolerant function and power-down protection provided on all inputs and outputs  
1
2007-10-19  

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