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TC74VCX16500FT(SPL

更新时间： 2024-09-10 12:59:27
品牌 Logo 应用领域
东芝 - TOSHIBA 总线驱动器总线收发器触发器逻辑集成电路光电二极管
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14页 232K
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TC74VCX16500FT(SPL

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TC74VCX16500FT(SPL 技术参数

是否Rohs认证： 不符合生命周期：End Of Life
包装说明：TSSOP, TSSOP56,.3,20Reach Compliance Code：unknown
风险等级：5.87控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONALJESD-30 代码：R-PDSO-G56
负载电容（CL）：30 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.024 A位数：18
功能数量：1端子数量：56
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP56,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH电源：3.3 V
Prop。Delay @ Nom-Sup：2.9 ns认证状态：Not Qualified
子类别：Bus Driver/Transceivers标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
触发器类型：NEGATIVE EDGEBase Number Matches：1

TC74VCX16500FT(SPL 数据手册

 浏览型号TC74VCX16500FT(SPL的Datasheet PDF文件第2页浏览型号TC74VCX16500FT(SPL的Datasheet PDF文件第3页浏览型号TC74VCX16500FT(SPL的Datasheet PDF文件第4页浏览型号TC74VCX16500FT(SPL的Datasheet PDF文件第5页浏览型号TC74VCX16500FT(SPL的Datasheet PDF文件第6页浏览型号TC74VCX16500FT(SPL的Datasheet PDF文件第7页 
TC74VCX16500FT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74VCX16500FT  
Low-Voltage 18-Bit Universal Bus Transceiver with 3.6-V Tolerant Inputs and Outputs  
The TC74VCX16500FT is a high-performance CMOS 18-bit  
universal bus transceiver. Designed for use in 1.8-V, 2.5-V or  
3.3-V systems, it achieves high-speed operation while  
maintaining the CMOS low power dissipation.  
It is also designed with overvoltage tolerant inputs and outputs  
up to 3.6 V.  
Data flow in each direction is controlled by output-enable  
(OEAB and OEBA), latch-enable (LEAB and LEBA), and clock  
(CKAB and CKBA) inputs.  
For A-to-B data flow, the device operates in the transparent  
mode when LEAB is high. When LEAB is low, the A data is  
Weight: 0.25 g (typ.)  
latched if CKAB is held at a high or low logic level. If LEAB is low,  
the A bus data is stored in the latch/flip-flop on the high-to-low transition of CKAB.  
Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CKBA.  
When the OE input is high, the outputs are in a high-impedance state. This device is designed to be used with  
3-state memory address drivers, etc.  
All inputs are equipped with protection circuits against static discharge.  
Features (Note)  
•
•
Low-voltage operation: V  
= 1.8 to 3.6 V  
CC  
High-speed operation: t = 2.9 ns (max) (V  
= 3.0 to 3.6 V)  
= 2.3 to 2.7 V)  
= 1.8 V)  
pd  
CC  
CC  
CC  
: t = 3.5 ns (max) (V  
pd  
: t = 7.0 ns (max) (V  
pd  
•
Output current: I /I  
= ±24 mA (min) (V  
= ±18 mA (min) (V  
= 3.0 V)  
OH OL  
CC  
CC  
: I /I  
OH OL  
= 2.3 V)  
: I /I  
OH OL  
= ±6 mA (min) (V  
= 1.8 V)  
CC  
•
•
Latch-up performance: −300 mA  
ESD performance:Machine model ≥ ±200 V  
Human body model ≥ ±2000 V  
•
•
•
Package: TSSOP  
Bidirectional interface between 2.5 V and 3.3 V signals.  
3.6-V tolerant function and power down protection provided on all inputs and outputs  
Note:  
Do not apply a signal to any bus pins when it is in the output mode. Damage may result.  
All floating (high impedance) bus pins must have their input level fixed by means of pull-up or pull-down  
resistors.  
1
2007-10-19  
1234567...14

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