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TC74ACT138F_12

更新时间: 2024-09-27 12:22:59
品牌 Logo 应用领域
东芝 - TOSHIBA /
页数 文件大小 规格书
8页 238K
描述
3-to-8 Line Decoder

TC74ACT138F_12 数据手册

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TC74ACT138P/F/FT  
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic  
TC74ACT138P,TC74ACT138F, TC74ACT138FT  
3-to-8 Line Decoder  
TC74ACT138P  
TC74ACT138F  
TC74ACT138FT  
The TC74ACT138 is an advanced high speed CMOS 3-to-8  
LINE DECODER fabricated with silicon gate and double-layer  
metal wiring C2MOS technology.  
It achieves the high speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low power  
dissipation.  
This device may be used as a level converter for interfacing  
TTL or NMOS to High Speed CMOS. The inputs are compatible  
with TTL, NMOS and CMOS output voltage levels.  
When the device is enabled, 3 Binary Select inputs (A, B and  
C) determine which one of the outputs ( Y0 - Y7 ) will go low.  
When enable input G1 is held low or either G2A or G2B is  
held high, decoding function is inhibited and all outputs go high.  
G1, G2A , and G2B inputs are provided to ease cascade  
connection and for use as an address decoder for memory  
systems.  
All inputs are equipped with protection circuits against static  
discharge or transient excess voltage.  
Features  
High speed: t = 6.0 ns (typ.) at V  
= 5 V  
pd  
CC  
Low power dissipation: I  
= 8 μA (max) at Ta = 25°C  
CC  
Compatible with TTL outputs: V = 0.8 V (max)  
IL  
V
IH  
= 2.0 V (min)  
Symmetrical output impedance: |I | = I  
= 24 mA (min)  
OH  
OL  
Capability of driving 50 Ω  
transmission lines.  
Weight  
Balanced propagation delays: t  
t
pLH  
pHL  
DIP16-P-300-2.54A  
SOP16-P-300-1.27A  
TSSOP16-P-0044-0.65A  
: 1.00 g (typ.)  
: 0.18 g (typ.)  
: 0.06 g (typ.)  
Pin and function compatible with 74F138  
1
2012-02-29  

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