TC74AC299F(EL)

更新时间： 2024-09-27 13:14:27

品牌	Logo	应用领域
东芝 - TOSHIBA		/
页数	文件大小	规格书
9页	426K
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数据手册

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TC74AC299F(EL) 数据手册

TC74AC299P/F

TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic

TC74AC299P,TC74AC299F

8-Bit PIPO Shift Register with Asynchronousclear

TC74AC299P

The TC74AC299 is an advanced high speed CMOS 8-BIT PIPO

SHIFT REGISTER fabricated with silicon gate and double-layer

metal wiring C²MOS technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low power

dissipation.

It has a four modes (HOLD, SHIFT LEFT, SHIFT RIGHT and

LOAD DATA) controlled by the two selection inputs (S0, S1).

When one or both enable ( G1 , G2 ) are high, the eight I/O

outputs are forced to the high-impedance state; however,

sequential operation or clearing of the register is not affected.

All inputs are equipped with protection circuits against static

discharge or transient excess voltage.

TC74AC299F

Features (Note 1)(Note 2)

•

High speed: f

= 150 MHz (typ.) at V

= 5 V

max

Low power dissipation: I

= 8 μA (max) at Ta = 25°C

High noise immunity: V

= V

= 28% V

(min)

Weight

DIP20-P-300-2.54A

SOP20-P-300-1.27A

NIH

NIL

: 1.30 g (typ.)

: 0.22 g (typ.)

Symmetrical output impedance: |I | = I

= 24 mA (min)

Capability of driving 50 Ω

tansmission lines.

∼

−

pHL

(opr) = 2 to 5.5 V

•

Balanced propagation delays: t

pLH

Wide operating voltage range: V

Pin and function compatible with 74F299

Note 1: Do not apply a signal to any bus terminal when it is in the output mode. Damage may result.

Note 2: All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull

down resistors.

Pin Assignment

2007-10-01

12 3 4 5 6 7...9

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