Datasheet > TC1017-2.5VLT

TC1017-2.5VLT

更新时间： 2024-01-30 21:42:28

品牌	Logo	应用领域
美国微芯 - MICROCHIP		光电二极管输出元件调节器
页数	文件大小	规格书
26页	573K
描述
FIXED POSITIVE LDO REGULATOR

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技术参数
数据手册

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TC1017-2.5VLT 技术参数

生命周期：	Active	包装说明：	TSSOP,
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.64
最大回动电压 1：	0.5 V	最大输入电压：	6 V
最小输入电压：	3.062 V	JESD-30 代码：	R-PDSO-G5
长度：	2 mm	功能数量：	1
端子数量：	5	工作温度TJ-Max：	125 °C
工作温度TJ-Min：	-40 °C	最大输出电流 1：	0.15 A
最大输出电压 1：	2.562 V	最小输出电压 1：	2.437 V
标称输出电压 1：	2.5 V	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	调节器类型：	FIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
筛选级别：	TS 16949	座面最大高度：	1.1 mm
表面贴装：	YES	技术：	CMOS
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	宽度：	1.25 mm
Base Number Matches：	1

TC1017-2.5VLT 数据手册

TC1017

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

Pin No.

5-Pin SC-70

5-Pin SOT-23

5-Pin SC-70R

Symbol

Description

SHDN

Shutdown Control Input

No Connect

GND

Ground Terminal

Regulated Voltage Output

Unregulated Supply Input

OUT

V_IN

3.1

Shutdown Control Input (SHDN)

3.3

Regulated Voltage Output (V

)

OUT

The regulator is fully enabled when a logic-high is

applied to SHDN. The regulator enters shutdown when

a logic-low is applied to this input. During shutdown, the

output voltage falls to zero and the supply current is

reduced to 0.05 µA (typ.)

Bypass the regulated voltage output to GND with a

minimum capacitance of 1 µF. A ceramic bypass

capacitor is recommended for best performance.

3.4

Unregulated Supply Input (V )

The minimum V_INhas to meet two conditions in order

to ensure that the output maintains regulation:

V_IN 2.7V and V_IN [(V_R+ 2.5%) + V_DROPOUT]. The

maximum V_INshould be less than or equal to 6V.

Power dissipation may limit V_INto a lower potential in

order to maintain a junction temperature below 125°C.

Refer to Section 5.0 “Thermal Considerations”, for

determining junction temperature.

3.2

Ground Terminal

For best performance, it is recommended that the

ground pin be tied to a ground plane.

It is recommended that V_INbe bypassed to GND with a

ceramic capacitor.

 2005-2013 Microchip Technology Inc.

DS21813F-page 9

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