TAS3202
SLES208B–JUNE 2009–REVISED MARCH 2011
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3.2 Terminal Descriptions
TERMINAL
INPUT/
PULLUP/
DESCRIPTION
Analog input, channel 1, left, – input
OUTPUT(1)
PULLDOWN(2)
NAME
NO.
13
12
15
14
17
16
19
18
33
34
35
36
AIN1LM
AIN1LP
Analog input
Analog input
Analog input
Analog input
Analog input
Analog input
Analog input
Analog input
Analog output
Analog output
Analog output
Analog output
Pull to VMID(3)
Pull to VMID(3)
Pull to VMID(3)
Pull to VMID(3)
Analog input, channel 1, left, + input
Analog input, channel 1, right, – input
Analog input, channel 1, right, + input
Analog input, channel 2, left, – input
Analog input, channel 2, left, + input
Analog input, channel 2, right, – input
Analog input, channel 2, right, + input
Analog output, channel 1, left, – output
Analog output, channel 1, left, + output
Analog output, channel 1, right, – output
Analog output, channel 1, right, + output
AIN1RM
AIN1RP
AIN2LM
AIN2LP
AIN2RM
AIN2RP
AOUTLM
AOUTLP
AOUTRM
AOUTRP
3.3-V analog power supply. This pin must be decoupled according to
good design practices.
AVDD1
AVSS1
AVDD2
AVSS2
AVDD3
24
11
28
37
40
Power
Power
Power
Power
Power
Analog supply ground
3.3-V analog power supply. This pin must be decoupled according to
good design practices.
Analog supply ground
3.3-V analog power supply. This pin must be decoupled according to
good design practices.
AVSS3
CS0
38
6
Power
Analog supply ground
I2C Chip select
Digital input
3.3-V digital power supply. This pin must be decoupled according to
good design practices.
DVDD1
DVSS1
DVDD2
DVSS2
DVDD3
9
Power
Power
Power
Power
Power
8
Digital supply ground
3.3-V digital power supply. This pin must be decoupled according to
good design practices.
45
44
57
Digital supply ground
3.3-V digital power supply. This pin must be decoupled according to
good design practices.
DVSS3
GPIO1
GPIO2
56
4
Power
Digital supply ground
Digital I/O
Digital I/O
General-purpose input/output
General-purpose input/output
3
Slave I2C serial clock input/output. Normally connected to the system
microprocessor.
I2C1_SCL
1
Digital I/O
Slave I2C serial control data interface input/output. Normally connected
to system micro.
Master I2C serial clock output. Normally connected to EEPROM.
Master I2C serial control data interface input/output. Normally
connected to EEPROM.
I2C1_SDA
I2C2_SCL
I2C2_SDA
2
Digital I/O
Digital output
Digital I/O
64
63
LRCLK_IN
58
51
Digital input
Pulldown
Pulldown
Serial data input left/right clock for I2S interface
Serial data output left/right clock for I2S interface
LRCLK_OUT
Digital output
MCLK input is used in slave mode. MCLK_IN must be locked to
LRCLK_IN, and the frequency is 512Fs (24.576 MHz for 48-kHz Fs).
MCLK_IN
43
48
Digital input
MCLK_OUT1
Digital output
12.288-MHz clock output. This output is valid even when reset is LOW.
(1) I = input; O = output
(2) All pullups are 20-μA weak pullups, and all pulldowns are 20-μA weak pulldowns. The pullups and pulldowns are included to ensure
proper input logic levels if the terminals are left unconnected (pullups → logic 1 input; pulldowns → logic 0 input). Devices that drive
inputs with pullups must be able to sink 20 μA while maintaining a logic-0 drive level. Devices that drive inputs with pulldowns must be
able to source 20 μA while maintaining a logic-1 drive level.
(3) Pull to VMID when analog input is in single-ended mode.
8
Physical Characteristics
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