Datasheet > TA33_08

TA33_08

更新时间： 2022-09-23 09:38:00

品牌	Logo	应用领域
威世 - VISHAY		电阻器
页数	文件大小	规格书
3页	89K
描述
Dual Value Chip Resistors, Center Tap

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TA33_08 数据手册

TA 33

Vishay Sfernice

Dual Value Chip Resistors, Center Tap

FEATURES

• Center tap feature

• Resistor material: self-passivating

Tantalum Nitride

• Silicon substrate for good power dissipation

• Low cost

Actual Size

• Wirebondable

These tantalum chips combine excellent stability 0.07 %

(2000 h, rated power at + 70 °C) with great power handling

capacity. Two bonding pads per termination allow greater

flexibility in hybrid layout design.

TYPICAL PERFORMANCE

ABS

TRACKING

5 ppm/°C

RATIO

TCR

TOL.

100 ppm/°C

ABS

0.5 %

SCHEMATIC

R_T

R₁

R₂

R_T= R₁+ R₂with R₁= R₂Standard

STANDARD ELECTRICAL SPECIFICATIONS

TEST

SPECIFICATIONS

TANTALUM NITRIDE

50 Ω to 1 MΩ

CONDITIONS

MATERIAL

Resistance range

for R_T= R₁+ R₂

- 55 °C to + 155 °C

Tracking

Absolute

Ratio

5 ppm/°C

TCR:

100 ppm/°C ( 50 ppm/°C on request)

1/1 standard (unequal values: please consult)

0.5 %, 1 %, 2 %

Ohmic value

Tolerance:

Absolute

Matching

0.5 % standard

Power dissipation

Stability

250 mW at + 25 °C, 125 mW at + 70 °C, 50 mW at + 125 °C

0.07 % typical, 0.1 maximum

50 V_DCon R_T

2000 h at + 70 °C under Pn

Working voltage

Operating temperature range

Storage temperature range

Noise

- 55 °C to + 155 °C

< - 35 dB typical

MIL-STD-202 Method 308

1 year at + 25 °C

Thermal EMF

0.01 µV/°C

Shelf life stability

100 ppm

* Please see document “Vishay Green and Halogen-Free Definitions (5-2008)” http://www.vishay.com/doc?99902

www.vishay.com

For technical questions, contact: sfer@vishay.com

Document Number: 60066

Revision: 06-Oct-08

12 3

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