Datasheet > T25Q16BWIGT

T25Q16BWIGT

更新时间： 2022-05-14 21:36:43

品牌	Logo	应用领域
华之美 - HMSEMI		/
页数	文件大小	规格书
74页	8655K
描述
3V 128M-BIT SERIAL NOR FLASH WITH DUAL AND QUAD SPI&QPI

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T25Q16BWIGT 数据手册

HM25Q128A

4. SIGNAL DESCRIPTIONS

Table 4.1 Pin Descriptions

Symbol

Pin Name

CLK

Serial Clock Input

Serial Data Input(Data input output 0) ⁽¹⁾

Serial Data Output(Data input output 1) ⁽¹⁾

Chip Enable

DI(IO0)

DO(IO1)

CS#

WP#(IO2)⁽³⁾

HOLD# / RESET#⁽³⁾(IO3)

V_CC

Write Protect (Data input output 2) ⁽²⁾

Hold or Reset input(Data input output 3) ⁽²⁾

Power Supply (2.3-3.6V)

GND

Ground

Notes:

(1)IO0 and IO1 are used for Standard and Dual SPI instructions.

(2)IO0—IO3 are used for QUAD SPI / QPI instructions.

(3)WP# and HOLD# / RESET# functions are only available for Standard and Dual SPI.

4.1. Serial Data Input (DI) / IO0

The SPI Serial Data Input (DI) pin is used to transfer data serially into the device. It receives instructions,

address and data to be programmed. Data is latched on the rising edge of the Serial Clock (CLK) input pin.

The DI pin becomes IO0 - an input and output during Dual and Quad commands for receiving instructions,

address, and data to be programmed (values latched on rising edge of serial CLK clock signal) as well as

shifting out data (on the falling edge of CLK).

4.2. Serial Data Output (DO) / IO1

The SPI Serial Data Output (DO) pin is used to transfer data serially out of the device. Data is shifted out

on the falling edge of the Serial Clock (CLK) input pin. DO becomes IO1 - an input and output during Dual and

Quad commands for receiving instructions, addresses, and data to be programmed (values latched on rising

edge of serial CLK clock signal) as well as shifting out data (on the falling edge of CLK).

4.3. Serial Clock (CLK)

The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See SPI

Mode")

4.4. Chip Select (CS#)

The SPI Chip Select (CS#) pin enables and disables device operation. When CS# is high the device is

deselected and the Serial Data Output pins are at high impedance.

When deselected, the devices power consumption will be at standby levels unless an internal erase,

program or status register cycle is in progress. When CS# is brought low the device will be selected, power

consumption will increase to active levels and instructions can be written to and data read from the device.

After power-up, CS# must transition from high to low before a new instruction will be accepted.

1...7 8 91011 12 13...74

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