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SY10H641LJZTR PDF预览

SY10H641LJZTR

更新时间: 2024-09-30 03:51:27
品牌 Logo 应用领域
麦瑞 - MICREL 时钟驱动器逻辑集成电路
页数 文件大小 规格书
6页 75K
描述
3.3V SINGLE SUPPLY 1:9 PECL-TO-TTL

SY10H641LJZTR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:QLCC
包装说明:QCCJ,针数:28
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.2Is Samacsys:N
系列:10H输入调节:DIFFERENTIAL LATCHED
JESD-30 代码:S-PQCC-J28JESD-609代码:e3
长度:11.48 mm逻辑集成电路类型:LOW SKEW CLOCK DRIVER
湿度敏感等级:2功能数量:1
反相输出次数:端子数量:28
实输出次数:9最高工作温度:85 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):245
传播延迟(tpd):3.5 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.35 ns座面最大高度:4.57 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:ECL温度等级:COMMERCIAL EXTENDED
端子面层:Matte Tin (Sn)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:11.48 mm
最小 fmax:135 MHzBase Number Matches:1

SY10H641LJZTR 数据手册

 浏览型号SY10H641LJZTR的Datasheet PDF文件第2页浏览型号SY10H641LJZTR的Datasheet PDF文件第3页浏览型号SY10H641LJZTR的Datasheet PDF文件第4页浏览型号SY10H641LJZTR的Datasheet PDF文件第5页浏览型号SY10H641LJZTR的Datasheet PDF文件第6页 
®
®
PrecisionEdge
SY10H641L  
3.3V SINGLE SUPPLY  
1:9 PECL-TO-TTL  
SY100H641L  
FEATURES  
3.3V power supply  
®
Precision Edge  
PECL-to-TTL version of popular ECLinPS E111  
Guaranteed low skew specification  
Latched input  
DESCRIPTION  
Differential ECL internal design  
VBB output for single-ended operation  
Reset/enable  
The SY10/100H641L are single supply, low skew  
translating 1:9 clock drivers. Devices in the Micrel H600  
translator series utilize the 28-lead PLCC for optimal  
power pinning, signal flow-through and electrical  
performance.  
The devices feature a 24mA TTL output stage with  
AC performance specified into a 20pF load capacitance.  
A latch is provided on-chip. When LEN is LOW (or left  
open, in which case it is pulled LOW by the internal pull-  
downs), the latch is transparent. A HIGH on the enable  
pin (/EN) forces all outputs LOW.  
Extra TTL and ECL power/ground pins  
Choice of ECL compatibility: MECL 10KH (10Hxxx)  
or 100K (100Hxxx)  
Available in 28-pin PLCC package  
BLOCK DIAGRAM  
The 10H version is compatible with MECL 10KH ECL  
logic levels. The 100H version is compatible with 100K  
levels.  
TTL Outputs  
Q
Q
Q
0
1
2
PIN NAMES  
Pin  
Function  
TTL Ground (0V)  
GT  
VT  
VE  
TTL VCC (+3.0V)  
ECL VCC (+3.0V)  
GE  
ECL Ground (0V)  
D, /D  
VBB  
Signal Input (PECL)  
VBB Reference Output (PECL)  
Signal Outputs (TTL)  
Enable Input (PECL)  
Latch Enable Input (PECL)  
Q
Q
Q
Q
3
4
5
6
PECL Input  
Q0 – Q8  
/EN  
D
D
D
Q
LEN  
V
BB  
LEN  
EN  
Q
Q
7
8
Precision Edge is a registered trademark of Micrel, Inc.  
Rev.: F  
Amendment:/0  
M9999-032906  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: March 2006  

SY10H641LJZTR 替代型号

型号 品牌 替代类型 描述 数据表
SY10H641JZTR MICREL

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