SY10H352

更新时间： 2024-09-30 03:52:55

品牌	Logo	应用领域
麦瑞 - MICREL		/
页数	文件大小	规格书
5页	59K
描述
QUAD CMOS-to-PECL TRANSLATOR

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数据手册

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SY10H352 数据手册

Micrel, Inc.

SY10H352

QUAD CMOS-to-PECL

TRANSLATOR

FEATURES

DESCRIPTION

The SY10H352 is a quad translator for interfacing data

between a CMOS logic section and the PECL section of

digital systems when only a +5.0V VDC power supply is

available. The SY10H352 has CMOS compatible inputs

and PECL complementary open-emitter outputs that allow

use as an inverting/non-inverting translator or as a

differential line driver. When the common strobe input is

at a low logic level, it forces all true outputs to the PECL

low logic state (≈ +3.2V) and all inverting outputs to the

PECL high logic state (≈ +4.1V).

■ Single 5V power supply

■ All V pins isolated on chip

■ Differentially drive balanced lines

■ t 1.3ns typical

■ Fully compatible with MC10H352

■ Available in 20-pin PLCC package

The SY10H352 can also be used with the SY10H350

to transmit and receive CMOS information differentially

via balanced twisted pair lines.

PIN NAMES

BLOCK DIAGRAM

D0 – D3

Function

/Q1

Inputs

Q0 – Q3

/Q0 – /Q3

VCC1

Outputs

/Q0

Inverted outputs

PECL V_CC(5.0V)

CMOS V_CC(5.0V)

PECL V_CC(5.0V)

Common Strobe

Ground

D3 12

D2 14

16 /Q3

17 Q3

VCCE

VCCT

19 /Q2

18 Q2

COMMON 9

STROBE

VCC2

Common Strobe

GND

(+5 V ) = Pins 6, 11, 15, 20;

GND = Pin 10

Rev.: B

Amendment:/0

M9999-032906

hbwhelp@micrel.com or (408) 955-1690

Issue Date: March 2006

12 3 4 5

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