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SY10E404_06 PDF预览

SY10E404_06

更新时间: 2024-01-18 19:51:55
品牌 Logo 应用领域
麦瑞 - MICREL /
页数 文件大小 规格书
4页 63K
描述
QUAD DIFFERENTIAL AND/NAND

SY10E404_06 数据手册

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4  
QUAD DIFFERENTIAL  
AND/NAND  
SY10E404  
SY100E404  
DESCRIPTION  
FEATURES  
Differential D and Q  
The SY10/100E404 are 4-bit differential AND/NAND  
devices. The differential operation of these devices make  
them ideal for pulse shaping applications where duty cycle  
skew is critical. Special design techniques were  
incorporated to minimize the skew between the upper  
and lower level gate inputs.  
Because a negative 2-input NAND function is  
equivalent to a 2-input OR function, the differential inputs  
and outputs of the devices also allow for their use as  
fully differential 2-input OR/NOR functions.  
Extended 100E VEE range of –4.2V to –5.5V  
700ps max. propagation delay  
High frequency outputs  
Internal 75Kinput pull-down resistors  
Fully compatible with Motorola 10E/100E404  
Available in 28-pin PLCC package  
The output RISE/FALL times of these devices are  
significantly faster than most other standard ECLinPS  
devices, resulting in an increased bandwidth.  
The differential inputs have clamp structures which  
will force the Q output of a gate in an open input condition  
to go to a LOW state. Thus, inputs of unused gates can  
be left open and will not affect the operation of the rest  
of the device.  
PIN NAMES  
BLOCK DIAGRAM  
Pin  
Function  
Differential Data Inputs  
Differential Data Outputs  
VCC to Output  
D0a  
D0a  
D0b  
D0b  
Q
Q
0
0
D[0:4], D[0:4]  
Q[0:4], Q[0:4]  
VCCO  
D1a  
D1a  
D1b  
D1b  
Q
Q
1
1
D2a  
D2a  
D2b  
D2b  
Q
Q
2
2
D3a  
D3a  
D3b  
D3b  
Q
Q
3
3
Rev.: G  
Amendment:/0  
M9999-032206  
hbwhelp@micrel.com or (408) 955-1690  
1
Issue Date: March 2006  

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