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STSR2PM

更新时间： 2024-11-27 03:30:47

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		驱动
页数	文件大小	规格书
12页	291K
描述
FORWARD SYNCHRONOUS RECTIFIERS SMART DRIVER

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中文翻译

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数据手册

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STSR2PM 数据手册

STSR2P/

STSR2PM

FORWARD SYNCHRONOUS

RECTIFIERS SMART DRIVER

■

SUPPLY VOLTAGE RANGE: 4.5V TO 5.5V

TYPICAL PEAK OUTPUT CURRENT:

SOURCE -2A, SINK 3.5A

■

OPERATING FREQUENCY: 20 TO 750 KHZ

SMART TURN-OFF ANTICIPATION TIMING

OPERATION INDEPENDENT FROM THE

FORWARD MAGNETIC RESET TECHNIQUE

SO-8

■

POSSIBILITY TO OPERATE IN

DISCONTINUOUS MODE

DESCRIPTION

anticipation in turning-off the OUT

with

GATE1

respect to the clock signal transition is provided,

STSR2P Smart Driver IC provides two

complementary high current outputs to drive

Power Mosfets. The IC is dedicated to properly

drive secondary Synchronous Rectifiers in

medium power, low output voltage, high efficiency

Forward Converters. From a synchronizing clock

input, STSR2P generates two driving signals with

the self-setting of dead time between

complementary pulses. The IC operation prevents

while the anticipation in turning off the OUT

GATE2

can be set through external components. The

adopted transitions revelation mechanism makes

circuit operation independent by the forward

magnetic reset technique used, avoiding most of

the common problems inherent in self-driven

synchronous rectifiers. A special Inhibit function

allows the shut-off of OUT

. This feature

GATE2

makes discontinuous conduction mode possible

and prevents the freewheeling mosfet from

sinking current from the output.

STSR2P automatically turns off the outputs when

duty-cycle is lower than 13%, while STSR2PM

works even at very low duty-cycle values.

secondary

side

shoot-through

conditions

providing proper timing at the outputs turn-off

transition. This smart function operates through a

fast cycle-after-cycle control logic mechanism

based on an internal high frequency oscillator,

synchronized by the clock signal.

A fixed

SCHEMATIC DIAGRAM

Vcc

5.7V

BIAS

UVLO

PEAK

DETECTOR

ANTICIPATION

SET

SETANT2

HIGH

FREQUENCY

OSCILLATOR

OUTGate1

OUTGate2

OUTPUT

BUFFERS

DIGITAL

CONTROL

INHIBIT

25mV

SGLGND

PWRGND

September 2003

1/12

12 3 4 5 6 7...12

中文翻译

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