STSLVDSP27BJR

更新时间： 2024-01-11 04:36:32

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		驱动器
页数	文件大小	规格书
23页	353K
描述
8-bit low voltage serializer with 1.8V high speed dual differential line drivers and embedded DPLL

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中文翻译

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STSLVDSP27BJR 数据手册

STSLVDSP27

8-bit low voltage serializer with 1.8V high speed

dual differential line drivers and embedded DPLL

Features

■ Sub-low voltage differential signaling:

= 150mV with R = 100Ω, C = 10pF

■ Clock range: 4 to 27 MHz in parallel mode,

BYP = Gnd

Flip-Chip20

■ Operative frequency serial mode, BYP = V

;

DIN0 to DOUT, CLKIN to CLKOUT,

serializer IC is provided with two power supply

rails, V and V . The first supply is related to

= 1 to 208 MHz max

OPR

the logic levels of the input data (DIN0-DIN7,

CLKIN) and Enables (EN, BYP, DV0, DV1) pins.

■ Embedded DPLL requires no external

components

provides the power supply to the output

■ Output voltage rise and fall times

current drivers in the device. V is always

= t

= 610ps typ at f

= 208MHz

rVOD

fVOD

OPR

expected to be a nominal 1.8V. V depends on

the application, but will always be equal to or

■ High speed propagation delay times

~t = 2.1ns typ at V = 3.0V; V = 1.8V

higher than V . In order to minimize static current

pLH pHL

consumption, it is possible to shut down the

transmitters when the interface is not used by

setting a power-down (EN) pin. This operation

reduces the maximum current consumption to

20µA, making this device ideal for portable

applications like mobile phones and portable

battery equipment. Simplified functionality can be

reached using the BYP select pin, which disables

the internal DPLL circuitry. When this pin is High

the device can work with serialized signals from

DIN0 input only. A synchronous CLKIN signal

must be provided and it will be put-out using sub-

LVDS level by CLKOUT port; the sub-LVDS data

will be put-out by DOUT port at a maximum

frequency of 208Mhz. This innovative device

provides an optimized high-speed link solution

from different CMOS sensor devices (parallel or

serial outputs) to more advanced graphic

■ Operating voltage range:

(OPR) = 2.5V to 3.6V

(OPR) = 1.65V to 1.95V

■ High impedance on driver outputs

= 1µA max; EN = Gnd; V = Gnd or V

■ Low voltage CMOS input threshold

(DIN0-DIN7, CLKIN, EN, BYP, DVO, DV1)

V = 0.3 x V max; V = 0.7 x V min

■ 3.6V tolerant on all inputs

(DIN0-DIN7, CLKIN, EN, BYP, DV0, DV1)

■ Lead-free Flip-Chip package

■ SMIA CCP1 (MIPI CSI-1) compatible PHY

Description

controllers in mobile phone applications. All inputs

and outputs are equipped with protection circuits

against static discharge, providing ESD immunity

from transient excess voltage. The STSLVDSP27

is designed for operation over the commercial

temperature range -40°C to 85°C.

The STSLVDSP27 is an 8:1 bit serializer with

embedded DPLL. The dual differential line drivers

implement the electrical characteristics of sub-low

voltage differential signaling (subLVDS), bringing

out the serialized data and related synchronous

clock signal. The STSLVDSP27

Order code

Part number

Temperature range

Package

Flip-Chip20 (Tape & Reel)

Rev. 1

Packaging

STSLVDSP27BJR

-40 to 85 °C

3000 parts per reel

June 2007

1/23

www.st.com

12 3 4 5 6 7...23

中文翻译

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