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STR710FZ0T6TR PDF预览

STR710FZ0T6TR

更新时间: 2023-02-26 14:32:31
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
78页 2014K
描述
32-BIT, FLASH, 66MHz, RISC MICROCONTROLLER, PQFP144, 20 X 20 MM, MS-026-BFB, LQFP-144

STR710FZ0T6TR 数据手册

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System architecture  
STR71xF  
3
System architecture  
Package choice: low pin-count 64-pin or feature-rich 144-pin LQFP or BGA  
The STR71x family is available in 5 main versions.  
The 144-pin versions have the full set of all features including CAN, USB and External  
Memory Interface (EMI).  
STR710F: 144-pin BGA or LQFP with CAN, USB and EMI  
STR710R: Flashless 144-pin BGA or LQFP with CAN, USB and EMI (no internal Flash  
memory)  
The three 64-pin versions (BGA or LQFP) do not include External Memory Interface.  
STR715F: 64-pin BGA or LQFP without CAN or USB  
STR711F: 64-pin BGA or LQFP with USB  
STR712F: 64-pin BGA or LQFP with CAN  
High speed Flash memory (STR71xF)  
The Flash program memory is organized in two banks of 32-bit wide Burst Flash memories  
enabling true read-while-write (RWW) operation. Device Bank 0 is up to 256 Kbytes in size,  
typically for the application program code. Bank 1 is 16 Kbytes, typically used for storing  
data constants. Both banks are accessed by the CPU with zero wait states @ 33 MHz  
Bank 0 memory endurance is 10K write/erase cycles and Bank 1 endurance is 100K  
write/erase cycles. Data retention is 20 years at 85°C on both banks. The two banks can be  
accessed independently in read or write. Flash memory can be accessed in two modes:  
Burst mode: 64-bit wide memory access at up to 50 MHz.  
Direct 32-bit wide memory access for deterministic operation at up to 33 MHz.  
The STR7 embedded Flash memory can be programmed using In-Circuit Programming or  
In-Application programming.  
IAP (in-application programming): The IAP is the ability to re-program the Flash memory  
of a microcontroller while the user program is running.  
ICP (in-circuit programming): The ICP is the ability to program the Flash memory of a  
microcontroller using JTAG protocol while the device is mounted on the user application  
board.  
The Flash memory can be protected against different types of unwanted access  
(read/write/erase). There are two types of protection:  
Sector Write Protection  
Flash Debug Protection (locks JTAG access)  
Refer to the STR7 Flash Programming Reference manual for details.  
Optional external memory (STR710)  
The non-multiplexed 16-bit data/24-bit address bus available on the STR710 (144-pin)  
supports four 16-Mbyte banks of external memory. Wait states are programmable  
individually for each bank allowing different memory types (Flash, EPROM, ROM, SRAM  
etc.) to be used to store programs or data.  
Figure 1 shows the general block diagram of the device family.  
6/78  

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