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STM32WL55CCU6TR PDF预览

STM32WL55CCU6TR

更新时间: 2024-02-21 06:56:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS LPWA静态存储器
页数 文件大小 规格书
145页 2983K
描述
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0 LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM

STM32WL55CCU6TR 数据手册

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STM32WL55xx STM32WL54xx  
Multiprotocol LPWAN dual core 32-bit Arm® Cortex®-M4/M0+  
LoRa®, (G)FSK, (G)MSK, BPSK, up to 256KB Flash, 64KB SRAM  
Datasheet - production data  
Features  
Radio  
Frequency range: 150 MHz to 960 MHz  
UFBGA73  
(5 x 5 mm)  
WLCSP59  
®
UFQFPN48  
(7 x 7 mm)  
Modulation: LoRa , (G)FSK, (G)MSK and  
BPSK  
– Adaptive real-time accelerator (ART  
Accelerator) allowing 0-wait-state  
RX sensitivity: 123 dBm for 2-FSK  
®
(at 1.2 Kbit/s), 148 dBm for LoRa  
execution from Flash memory, frequency  
up to 48 MHz, MPU and DSP instructions  
(at 10.4 kHz, spreading factor 12)  
Transmitter high output power, programmable  
– 1.25 DMIPS/MHz (Dhrystone 2.1)  
up to +22 dBm  
®
®
32-bit Arm Cortex -M0+ CPU  
– Frequency up to 48 MHz, MPU  
– 0.95 DMIPS/MHz (Dhrystone 2.1)  
Transmitter low output power, programmable  
up to +15 dBm  
Compliant with the following radio frequency  
regulations such as ETSI EN 300 220,  
EN 300 113, EN 301 166, FCC CFR 47  
Part 15, 24, 90, 101 and the Japanese ARIB  
STD-T30, T-67, T-108  
Security and identification  
Hardware encryption AES 256-bit  
True random number generator (RNG)  
Compatible with standardized or proprietary  
Sector protection against read/write operations  
®
protocols such as LoRaWAN , Sigfox™,  
(PCROP, RDP, WRP)  
W-MBus and more (fully open wireless  
system-on-chip)  
CRC calculation unit  
Unique device identifier (64-bit UID compliant  
with IEEE 802-2001 standard)  
Ultra-low-power platform  
96-bit unique die identifier  
1.8 V to 3.6 V power supply  
Hardware public key accelerator (PKA)  
Key management services  
40 °C to +105 °C temperature range  
Shutdown mode: 31 nA (V = 3 V)  
DD  
Secure sub-GHz MAC layer  
Secure firmware update (SFU)  
Secure firmware install (SFI)  
Standby (+ RTC) mode:  
360 nA (V = 3 V)  
DD  
Stop2 (+ RTC) mode: 1.07 µA (V = 3 V)  
DD  
®
Active-mode MCU: < 72 µA/MHz (CoreMark )  
Active-mode RX: 4.82 mA  
Supply and reset management  
High-efficiency embedded SMPS step-down  
Active-mode TX: 15 mA at 10 dBm and 87 mA  
converter  
®
at 20 dBm (LoRa 125 kHz)  
SMPS to LDO smart switch  
Core  
Ultra-safe, low-power BOR (brownout reset)  
®
®
with 5 selectable thresholds  
32-bit Arm Cortex -M4 CPU  
Ultra-low-power POR/PDR  
November 2020  
DS13293 Rev 1  
1/145  
This is information on a product in full production.  
www.st.com  

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