STM32F303RET7 PDF预览

STM32F303RET7

更新时间: 2025-07-14 17:33:23
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 比较器
页数 文件大小 规格书
173页 2340K
描述
带DSP和FPU的主流混合信号ARM Cortex-M4 MCU,具有512 KB Flash、72 MHz CPU、MPU、CCM、5 Msps 12位ADC、PGA和比较器

STM32F303RET7 数据手册

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STM32F303xD STM32F303xE  
ARM® Cortex®-M4 32b MCU+FPU, up to 512KB Flash, 80KB SRAM,  
FSMC, 4 ADCs, 2 DAC ch., 7 comp, 4 Op-Amp, 2.0-3.6 V  
Datasheet - production data  
Features  
®
®
Core: ARM Cortex -M4 32-bit CPU with  
72 MHz FPU, single-cycle multiplication and  
HW division, 90 DMIPS (from CCM), DSP  
instruction and MPU (memory protection unit)  
LQFP100  
(14 × 14 mm)  
LQFP144  
(20 x 20 mm)  
LQFP64  
(10 × 10 mm)  
Operating conditions:  
– V , V  
voltage range: 2.0 V to 3.6 V  
DD  
DDA  
Memories  
WLCSP100  
4.775 x 5.041 mm  
UFBGA100  
(7 x 7 mm)  
– Up to 512 Kbytes of Flash memory  
(
)
– 64 Kbytes of SRAM, with HW parity check  
implemented on the first 32 Kbytes.  
Two 12-bit DAC channels with analog supply  
from 2.4 to 3.6 V  
– Routine booster: 16 Kbytes of SRAM on  
instruction and data bus, with HW parity  
check (CCM)  
Seven ultra-fast rail-to-rail analog comparators  
with analog supply from 2.0 to 3.6 V  
Four operational amplifiers that can be used in  
PGA mode, all terminals accessible with  
analog supply from 2.4 to 3.6 V  
– Flexible memory controller (FSMC) for  
static memories, with four Chip Select  
CRC calculation unit  
Up to 24 capacitive sensing channels supporting  
touchkey, linear and rotary touch sensors  
Reset and supply management  
– Power-on/Power-down reset (POR/PDR)  
Up to 14 timers:  
– Programmable voltage detector (PVD)  
– One 32-bit timer and two 16-bit timers with  
up to four IC/OC/PWM or pulse counter  
and quadrature (incremental) encoder input  
– Low-power modes: Sleep, Stop and  
Standby  
– V  
supply for RTC and backup registers  
BAT  
– Three 16-bit 6-channel advanced-control  
timers, with up to six PWM channels,  
Clock management  
– 4 to 32 MHz crystal oscillator  
– 32 kHz oscillator for RTC with calibration  
– Internal 8 MHz RC with x 16 PLL option  
Internal 40 kHz oscillator  
deadtime generation and emergency stop  
– One 16-bit timer with two IC/OCs, one  
OCN/PWM, deadtime generation and  
emergency stop  
– Two 16-bit timers with IC/OC/OCN/PWM,  
deadtime generation and emergency stop  
Up to 115 fast I/Os  
– All mappable on external interrupt vectors  
– Two watchdog timers (independent,  
window)  
– Several 5 V-tolerant  
Interconnect matrix  
– One SysTick timer: 24-bit downcounter  
– Two 16-bit basic timers to drive the DAC  
12-channel DMA controller  
Four ADCs 0.20 µs (up to 40 channels) with  
selectable resolution of 12/10/8/6 bits, 0 to  
3.6 V conversion range, separate analog  
supply from 2.0 to 3.6 V  
Calendar RTC with Alarm, periodic wakeup  
from Stop/Standby  
Communication interfaces  
– CAN interface (2.0B Active)  
October 2016  
DocID026415 Rev 5  
1/173  
This is information on a product in full production.  
www.st.com  

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