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STM32F103R4T7XXXTR PDF预览

STM32F103R4T7XXXTR

更新时间: 2024-02-25 12:37:41
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 时钟微控制器外围集成电路
页数 文件大小 规格书
87页 1237K
描述
IC,MICROCONTROLLER,32-BIT,CMOS,QFP,64PIN,PLASTIC

STM32F103R4T7XXXTR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:QFP, QFP64,.47SQ,20针数:64
Reach Compliance Code:compliant风险等级:5.8
具有ADC:YES地址总线宽度:
位大小:32CPU系列:CORTEX-M3
最大时钟频率:16 MHzDMA 通道:YES
外部数据总线宽度:JESD-30 代码:S-PQFP-G64
JESD-609代码:e3长度:10 mm
湿度敏感等级:1I/O 线路数量:51
端子数量:64最高工作温度:105 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP64,.47SQ,20封装形状:SQUARE
封装形式:FLATPACK峰值回流温度(摄氏度):225
电源:2.5/3.3 V认证状态:Not Qualified
RAM(字节):6144ROM(单词):16384
ROM可编程性:FLASH速度:72 MHz
子类别:Microcontrollers最大压摆率:46 mA
最大供电电压:3.6 V最小供电电压:2 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:10 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

STM32F103R4T7XXXTR 数据手册

 浏览型号STM32F103R4T7XXXTR的Datasheet PDF文件第4页浏览型号STM32F103R4T7XXXTR的Datasheet PDF文件第5页浏览型号STM32F103R4T7XXXTR的Datasheet PDF文件第6页浏览型号STM32F103R4T7XXXTR的Datasheet PDF文件第8页浏览型号STM32F103R4T7XXXTR的Datasheet PDF文件第9页浏览型号STM32F103R4T7XXXTR的Datasheet PDF文件第10页 
STM32F103x4, STM32F103x6  
List of figures  
List of figures  
Figure 1.  
Figure 2.  
Figure 3.  
Figure 4.  
Figure 5.  
Figure 6.  
Figure 7.  
Figure 8.  
Figure 9.  
STM32F103xx performance line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
STM32F103xx performance line LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
STM32F103xx performance line TFBGA64 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
STM32F103xx performance line LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
STM32F103xx performance line VFQFPN48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
STM32F103xx performance line VFQFPN36 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28  
Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Figure 10. Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Figure 11. Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30  
Figure 12. Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31  
Figure 13. Typical current consumption in Run mode versus frequency (at 3.6 V) -  
code with data processing running from RAM, peripherals enabled. . . . . . . . . . . . . . . . . . 37  
Figure 14. Typical current consumption in Run mode versus frequency (at 3.6 V) -  
code with data processing running from RAM, peripherals disabled . . . . . . . . . . . . . . . . . 37  
Figure 15. Typical current consumption on V  
with RTC on versus temperature at different  
BAT  
V
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39  
BAT  
Figure 16. Typical current consumption in Stop mode with regulator in Run mode versus  
temperature at V = 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40  
DD  
Figure 17. Typical current consumption in Stop mode with regulator in Low-power mode versus  
temperature at V = 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40  
DD  
Figure 18. Typical current consumption in Standby mode versus temperature at  
V
= 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41  
DD  
Figure 19. High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46  
Figure 20. Low-speed external clock source AC timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46  
Figure 21. Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47  
Figure 22. Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49  
Figure 23. Standard I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57  
Figure 24. Standard I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57  
Figure 25. 5 V tolerant I/O input characteristics - CMOS port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58  
Figure 26. 5 V tolerant I/O input characteristics - TTL port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58  
Figure 27. I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61  
Figure 28. Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62  
2
Figure 29. I C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64  
Figure 30. SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66  
(1)  
Figure 31. SPI timing diagram - slave mode and CPHA = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66  
(1)  
Figure 32. SPI timing diagram - master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67  
Figure 33. USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . 68  
Figure 34. ADC accuracy characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71  
Figure 35. Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72  
Figure 36. Power supply and reference decoupling (V  
not connected to V  
). . . . . . . . . . . . . . 72  
REF+  
DDA  
Figure 37. Power supply and reference decoupling(V  
Figure 38. VFQFPN36 6 x 6 mm, 0.5 mm pitch, package outline  
Figure 39. Recommended footprint (dimensions in mm)  
Figure 40. VFQFPN48 7 x 7 mm, 0.5 mm pitch, package outline  
connected to V  
) . . . . . . . . . . . . . . . . . 73  
REF+  
DDA  
(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75  
(1)(2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75  
(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76  
(1)(2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76  
Figure 41. Recommended footprint (dimensions in mm)  
Figure 42. LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . 77  
Doc ID 15060 Rev 5  
7/87  

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