STM32F103x4, STM32F103x6
List of figures
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
STM32F103xx performance line block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Clock tree . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STM32F103xx performance line LQFP64 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STM32F103xx performance line TFBGA64 ballout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
STM32F103xx performance line LQFP48 pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
STM32F101xx Medium-density access line VFQFPN36 pinout. . . . . . . . . . . . . . . . . . . . . 22
Memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Pin loading conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 10. Power supply scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 11. Current consumption measurement scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 12. Typical current consumption in Run mode versus frequency (at 3.6 V) -
code with data processing running from RAM, peripherals enabled. . . . . . . . . . . . . . . . . . 35
Figure 13. Typical current consumption in Run mode versus frequency (at 3.6 V) -
code with data processing running from RAM, peripherals disabled . . . . . . . . . . . . . . . . . 35
Figure 14. Typical current consumption on V
with RTC on versus temperature at different
BAT
V
values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
BAT
Figure 15. Typical current consumption in Stop mode with regulator in Run mode versus
temperature at V = 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
DD
Figure 16. Typical current consumption in Stop mode with regulator in Low-power mode versus
temperature at V = 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
DD
Figure 17. Typical current consumption in Standby mode versus temperature at
V
= 3.3 V and 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
DD
Figure 18. High-speed external clock source AC timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 19. Low-speed external clock source AC timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Figure 20. Typical application with an 8 MHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 21. Typical application with a 32.768 kHz crystal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 22. I/O AC characteristics definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 23. Recommended NRST pin protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
2
Figure 24. I C bus AC waveforms and measurement circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 25. SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
(1)
Figure 26. SPI timing diagram - slave mode and CPHA = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
(1)
Figure 27. SPI timing diagram - master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 28. USB timings: definition of data signal rise and fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Figure 29. ADC accuracy characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 30. Typical connection diagram using the ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 31. Power supply and reference decoupling (V
not connected to V
). . . . . . . . . . . . . . 66
REF+
DDA
Figure 32. Power supply and reference decoupling(V
Figure 33. VFQFPN36 6 x 6 mm, 0.5 mm pitch, package outline
Figure 34. Recommended footprint (dimensions in mm)
connected to V
) . . . . . . . . . . . . . . . . . 67
REF+
DDA
(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
(1)(2)(3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
Figure 35. LQFP64, 10 x 10 mm, 64-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . 70
(1)
Figure 36. Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 37. TFBGA64 - 8 x 8 active ball array, 5 x 5 mm, 0.5 mm pitch, package outline . . . . . . . . . . 71
Figure 38. Recommended PCB design rules for pads (0.5 mm pitch BGA) . . . . . . . . . . . . . . . . . . . . 72
Figure 39. LQFP48, 7 x 7 mm, 48-pin low-profile quad flat package outline . . . . . . . . . . . . . . . . . . . . 73
(1)
Figure 40. Recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 41. LQFP64 P max vs. T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
D
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