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STM32F103CBT6XXX

更新时间： 2024-01-26 09:29:17
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 闪存微控制器和处理器外围集成电路通信时钟
页数 文件大小 规格书
92页 1212K
描述
Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces

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STM32F103CBT6XXX 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：QFP, QFP48,.35SQ,20Reach Compliance Code：compliant
风险等级：5.77具有ADC：YES
地址总线宽度：位大小：32
CPU系列：CORTEX-M3最大时钟频率：8 MHz
DMA 通道：YES外部数据总线宽度：
JESD-30 代码：S-PQFP-G48JESD-609代码：e4
长度：7 mm湿度敏感等级：3
I/O 线路数量：37端子数量：48
片上程序ROM宽度：8最高工作温度：85 °C
最低工作温度：-40 °CPWM 通道：YES
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：QFP48,.35SQ,20封装形状：SQUARE
封装形式：FLATPACK电源：2.5/3.3 V
认证状态：Not QualifiedRAM（字节）：20480
ROM（单词）：131072ROM可编程性：FLASH
速度：72 MHz子类别：Microcontrollers
最大压摆率：50 mA最大供电电压：3.6 V
最小供电电压：2 V标称供电电压：2.7 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD宽度：7 mm
uPs/uCs/外围集成电路类型：MICROCONTROLLER, RISCBase Number Matches：1

STM32F103CBT6XXX 数据手册

 浏览型号STM32F103CBT6XXX的Datasheet PDF文件第84页浏览型号STM32F103CBT6XXX的Datasheet PDF文件第85页浏览型号STM32F103CBT6XXX的Datasheet PDF文件第86页浏览型号STM32F103CBT6XXX的Datasheet PDF文件第88页浏览型号STM32F103CBT6XXX的Datasheet PDF文件第89页浏览型号STM32F103CBT6XXX的Datasheet PDF文件第90页 
STM32F103x8, STM32F103xB  
Table 58. Document revision history (continued)  
Revision history  
Date  
Revision  
Changes  
STM32F103CBT6, STM32F103T6 and STM32F103T8 root part  
numbers added (see Table 2: STM32F103xx medium-density device  
features and peripheral counts)  
VFQFPN36 package added (see Section 6: Package characteristics).  
All packages are ECOPACK® compliant. Package mechanical data  
inch values are calculated from mm and rounded to 4 decimal digits  
(see Section 6: Package characteristics).  
Table 5: Medium-density STM32F103xx pin definitions updated and  
clarified.  
Table 26: Low-power mode wakeup timings updated.  
TA min corrected in Table 12: Embedded internal reference voltage.  
Note 2 added below Table 22: HSE 4-16 MHz oscillator characteristics.  
VESD(CDM) value added to Table 32: ESD absolute maximum ratings.  
Note 3 added and VOH parameter description modified in Table 35:  
Output voltage characteristics.  
Note 1 modified under Table 36: I/O AC characteristics.  
Equation 1 and Table 46: RAIN max for fADC = 14 MHz added to  
Section 5.3.17: 12-bit ADC characteristics.  
VAIN, tS max, tCONV, VREF+ min and tlat max modified, notes modified  
and tlatr added in Table 45: ADC characteristics.  
Figure 31: ADC accuracy characteristics updated. Note 1 modified  
below Figure 32: Typical connection diagram using the ADC.  
Electrostatic discharge (ESD) on page 56 modified.  
Number of TIM4 channels modified in Figure 1: STM32F103xx  
performance line block diagram.  
Maximum current consumption Table 13, Table 14 and Table 15  
updated. Vhysmodified in Table 34: I/O static characteristics.  
Table 48: ADC accuracy updated. tVDD modified in Table 10: Operating  
conditions at power-up / power-down. VFESD value added in Table 30:  
EMS characteristics.  
18-Oct-2007  
3
Values corrected, note 2 modified and note 3 removed in Table 26:  
Low-power mode wakeup timings.  
Table 16: Typical and maximum current consumptions in Stop and  
Standby modes: Typical values added for VDD/VBAT = 2.4 V, Note 2  
modified, Note 2 added.  
Table 21: Typical current consumption in Standby mode added. On-chip  
peripheral current consumption on page 47 added.  
ACCHSI values updated in Table 24: HSI oscillator characteristics.  
Vprog added to Table 28: Flash memory characteristics.  
Upper option byte address modified in Figure 9: Memory map.  
Typical fLSI value added in Table 25: LSI oscillator characteristics and  
internal RC value corrected from 32 to 40 kHz in entire document.  
TS_temp added to Table 49: TS characteristics. NEND modified in  
Table 29: Flash memory endurance and data retention.  
TS_vrefint added to Table 12: Embedded internal reference voltage.  
Handling of unused pins specified in General input/output  
characteristics on page 57. All I/Os are CMOS and TTL compliant.  
Figure 33: Power supply and reference decoupling (VREF+ not  
connected to VDDA) modified.  
tJITTER and fVCO removed from Table 27: PLL characteristics.  
Appendix A: Important notes on page 81 added.  
Added Figure 14, Figure 15, Figure 17 and Figure 19.  
Doc ID 13587 Rev 11  
87/92  
1...84858687888990...92

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与STM32F103CBT6XXX相关器件

型号 品牌 描述 获取价格 数据表
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STM32F103CBT7TR STMICROELECTRONICS Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7

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STM32F103CBT7XXX STMICROELECTRONICS Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7

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STM32F103CBU6TR STMICROELECTRONICS Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7

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STM32F103CBU6XXX STMICROELECTRONICS Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7

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STM32F103CBU7TR STMICROELECTRONICS Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7

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