Datasheet > STM1404ATOIQ1F

STM1404ATOIQ1F

更新时间： 2025-07-22 09:15:11

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
8页	186K
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STM1404ATOIQ1F

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STM1404ATOIQ1F 数据手册

STM1403, STM1404

TAMPER DETECTION

Physical

Supply Voltage

The internally switched supply voltage, V

There are four (4) high-impedance physical

tamper detect input pins, 2 normally set to High

(NH) and 2 normally set to Low (NL). Each input is

designed with a glitch immunity. These inputs can

be connected externally to several types of actua-

tor devices (e.g., switches, wire mesh). A tamper

on any one of the four inputs that causes its state

to change will trigger the security alarm (SAL) and

drive it to active-low. Once the tamper condition no

longer exists, the SAL will return to its normal High

state.

(ei-

INT

ther V input or V

input) is continuously mon-

BAT

itored. If V

should exceed the over voltage trip

INT

point, V (set at 4.2V, typical), or should go below

the under voltage trip point, V (set at 2.0v, typi-

cal). SAL will be driven active-low. Once the

tamper condition no longer exists, the SAL pin will

return to its normal High state.

Temperature (STM1404 Only)

The STM1404 has a built-in, bandgap-based sen-

sor to monitor the temperature. If a preset (cus-

tomer-selectable, factory-programmed) over-

TP and TP are set Normally to High (NH). They

are connected externally through a closed switch

or a high-impedance resistor to V (in the case

of STM1403/4A or STM1404A) or V

case of STM1403B/C, or STM1404B/C), A tamper

condition will be detected when the input pin is

temperature trip point (T ) or under-temperature

OUT

trip point (T ) is exceeded, the SAL is asserted

(in the

TPU

low.

When no tamper condition exists, SAL is normally

High (see PIN DESCRIPTIONS, page 9 of the full

datasheet for details).

When a tamper is detected, the SAL is activated

(driven low), independent of the part type. V

can be driven to one of three states, depending on

which variant of STM1403 or STM1404 is being

used (see Device Options, page 1):

pulled low. If not used, tie the pin to V

or V

TPU

OUT

TP and TP are set Normally to Low (NL). They

are connected externally through a high-imped-

ance resistor or a closed switch to V . A tamper

condition will be detected when the input pin is

pulled high. If not used, tie the pin to V

OUT

■

ON;

High-Z; or

Ground (V ).

Note: The STM1403 or STM1404 must be initially

powered above V to enable the tamper detec-

RST

tion alarms. For example, if the battery is on while

= 0V, no alarm condition can be detected until

rises above V

(and t expires). From this

RST

rec

point on, alarms can be detected either on battery

or V . This is done to avoid false alarms when

the device goes from no power to its operational

state.

5/8

1 2 3 456 7 8

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