STM1403, STM1404
SUMMARY DESCRIPTION
The STM1403/4 family of security supervisors are
a low power family of intrusion (tamper) detection
chips targeted at manufacturers of POS terminals
and other systems, to enable them to meet phys-
ical and/or environmental intrusion monitoring
requirements as mandated by various standards,
such as Federal Information Processing Stan-
dards (FIPS) Pub 140 entitled “Security Require-
ments for Cryptographic Modules,” published by
the National Institute of Standards and Technolo-
gy, U.S. Department of Commerce), EMVCo, ISO,
ZKA, and VISA PED.
STM1404 will target the highest security level 4
and include both physical and environmental (volt-
age and temperature) monitoring, while STM1403
will be a 100% pin-compatible, functional subset of
the STM1404, to target levels 3 and lower, and in-
cludes all of the functionality of the STM1404, ex-
cept for the over/under temperature monitoring.
The STM1404A and the STM1403A also offer a
(1.237V) as an option on pin 9. On
V
REF
STM1403B/C and STM1404B/C this pin is V
TPU
(internally switched V or V
).
BAT
CC
V
Pin Modes
OUT
Either part type can be made available in three
versions, corresponding to three modes of the
V
pin (Supply Voltage Out), when the SAL (Se-
OUT
curity Alarm) is asserted (active-low) upon tamper
detection:
STM1403A, STM1404A. V
stays ON (at V
CC
OUT
or V
) when SAL is driven low (activated).
BAT
STM1403B and STM1404B. V
is set to High-
OUT
Z when SAL is driven low (activated).
STM1403C and STM1404C. V is driven to
OUT
Ground when SAL is activated (may be used when
is connected directly to the V pin of the ex-
V
OUT
CC
ternal SRAM that holds the cryptographic codes).
The STM1403 and STM1404 include Automatic
Battery Switchover, RST Output (Open Drain),
Manual (Push-button) Reset Input (MR), Power-
fail Comparator (PFI/PFO), Physical and/or Envi-
ronmental Tamper Detect/Security Alarm, and
Battery Low Voltage Detect features.
All variants (see Table 1., Device Options) are pin-
compatible and available in a security-friendly, low
profile, 16-pin QFN package.
Figure 2. Logic Diagram
Table 2. Signal Names
(1)
V
CC
Switch Output
Vccsw
Manual (Push-button) Reset Input
Power-fail Input
MR
PFI
V
REF
(3)
or
V
Independent Physical Tamper
Detect Pins 1 through 4
BLD
V
CC
BAT
TP - TP
(1)
1
4
V
TPU
V
Supply Voltage Output
Active-low Reset Output
Power-fail Output
OUT
(2)
V
V
OUT
CCSW
(2)
RST
(3)
MR
PFI
RST
(2)
PFO
STM1403/4
(3)
PFO
SAL
(2)
Security Alarm Output
Battery Low Voltage Detect
1.237V Reference Voltage
Tamper Pull-up
SAL
(3)
(2)
TP (NH)
BLD
1
(3)
V
V
REF
TPU
V
TP
TP
TP
4
(3)
SS
2
3
(V or V
)
CC
BAT
(NL) (NH) (NL)
AI09682
V
V
V
Back-up Supply Voltage
Supply Voltage
Ground
BAT
CC
SS
Note: See PIN DESCRIPTIONS, page 9 of the full datasheet for
details.
Note: 1. V
only for STM1403/4A; V
for STM1403B/C and
TPU
REF
STM1404B/C.
2. Normal Mode: Low when V
V
1. Normal Mode: Low when V
is internally switched to
OUT
is internally switched to
OUT
V
and High when V
is internally switched to battery.
CC
OUT
and High when V
is internally switched to battery.
CC
OUT
2. SAL, RST, PFO, and BLD are Open Drain.
3. V only for STM1403/4A; V for STM1403B/C and
3. SAL, RST, PFO, and BLD are Open Drain.
REF
TPU
STM1404B/C.
2/8
5秒后页面跳转
STM32H743技术深度剖析与应用案例探索
LM321中文资料解析：引脚功能介绍、技术特点、技术特性分析
74HC14芯片资料介绍：性能特性分析、引脚介绍
LM1875芯片手册：功放参数分析、引脚说明、电路设计要点
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
技术参数
数据手册
如果您发现信息不准确，
