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STM1403BSM-Q1F PDF预览

STM1403BSM-Q1F

更新时间: 2024-01-20 01:48:03
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意法半导体 - STMICROELECTRONICS /
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8页 186K
描述
STM1403BSM-Q1F

STM1403BSM-Q1F 技术参数

生命周期:ObsoleteReach Compliance Code:compliant
风险等级:5.84Base Number Matches:1

STM1403BSM-Q1F 数据手册

 浏览型号STM1403BSM-Q1F的Datasheet PDF文件第2页浏览型号STM1403BSM-Q1F的Datasheet PDF文件第3页浏览型号STM1403BSM-Q1F的Datasheet PDF文件第4页浏览型号STM1403BSM-Q1F的Datasheet PDF文件第6页浏览型号STM1403BSM-Q1F的Datasheet PDF文件第7页浏览型号STM1403BSM-Q1F的Datasheet PDF文件第8页 
STM1403, STM1404  
TAMPER DETECTION  
Physical  
Supply Voltage  
The internally switched supply voltage, V  
There are four (4) high-impedance physical  
tamper detect input pins, 2 normally set to High  
(NH) and 2 normally set to Low (NL). Each input is  
designed with a glitch immunity. These inputs can  
be connected externally to several types of actua-  
tor devices (e.g., switches, wire mesh). A tamper  
on any one of the four inputs that causes its state  
to change will trigger the security alarm (SAL) and  
drive it to active-low. Once the tamper condition no  
longer exists, the SAL will return to its normal High  
state.  
(ei-  
INT  
ther V input or V  
input) is continuously mon-  
CC  
BAT  
itored. If V  
should exceed the over voltage trip  
INT  
point, V (set at 4.2V, typical), or should go below  
HV  
the under voltage trip point, V (set at 2.0v, typi-  
LV  
cal). SAL will be driven active-low. Once the  
tamper condition no longer exists, the SAL pin will  
return to its normal High state.  
Temperature (STM1404 Only)  
The STM1404 has a built-in, bandgap-based sen-  
sor to monitor the temperature. If a preset (cus-  
tomer-selectable, factory-programmed) over-  
TP and TP are set Normally to High (NH). They  
1
3
are connected externally through a closed switch  
or a high-impedance resistor to V (in the case  
of STM1403/4A or STM1404A) or V  
case of STM1403B/C, or STM1404B/C), A tamper  
condition will be detected when the input pin is  
temperature trip point (T ) or under-temperature  
H
OUT  
trip point (T ) is exceeded, the SAL is asserted  
L
(in the  
TPU  
low.  
When no tamper condition exists, SAL is normally  
High (see PIN DESCRIPTIONS, page 9 of the full  
datasheet for details).  
When a tamper is detected, the SAL is activated  
(driven low), independent of the part type. V  
can be driven to one of three states, depending on  
which variant of STM1403 or STM1404 is being  
used (see Device Options, page 1):  
pulled low. If not used, tie the pin to V  
or V  
.
TPU  
OUT  
TP and TP are set Normally to Low (NL). They  
2
4
are connected externally through a high-imped-  
ance resistor or a closed switch to V . A tamper  
condition will be detected when the input pin is  
pulled high. If not used, tie the pin to V  
OUT  
SS  
.
SS  
ON;  
High-Z; or  
Ground (V ).  
SS  
Note: The STM1403 or STM1404 must be initially  
powered above V to enable the tamper detec-  
RST  
tion alarms. For example, if the battery is on while  
V
V
= 0V, no alarm condition can be detected until  
CC  
CC  
rises above V  
(and t expires). From this  
RST  
rec  
point on, alarms can be detected either on battery  
or V . This is done to avoid false alarms when  
CC  
the device goes from no power to its operational  
state.  
5/8  

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