Datasheet > STA321MPL1TR

STA321MPL1TR

更新时间： 2024-02-12 06:35:13

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		/
页数	文件大小	规格书
80页	1676K
描述
Scalable digital microphone processor

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数据手册

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STA321MPL1TR 数据手册

STA321MPL1

Startup/shutdown pop noise removal

7.1

DPT: PWM and tristate delay (0x80)

DPT4

DPT3

DPT2

DPT1

DPT0

Bit

RST

Name

Description

DPT0

DPT1

DPT2

DPT3

DPT4

Set a delay between the PWM and the tristate

signal to compensate the external amplifier delay.

7.2

Configuration register (0x81)

RL3

RL2

RL1

RL0

SID1

FBYP

RTP

Bit

RST

Name

Description

Remove tristate initial pulses

1: remove the tristate initial pulses with frequency less

than 16 kHz

RTP

0: the tristate initial pulses are not removed

Bit

RST

Name

Description

Fault user-defined bypass mode

FBYP

1: the fault internal management is disabled

0: the fault internal management is enabled

Bit

RST

Name

Description

Serial interface (I²S out)

1: SDO_56 is connected to the fault signal and SDO_78

outputs the tristate signal

SID1

0: I²S out normal

DocID029389 Rev 1

75/80

1...72 73 747576 77 78...80

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