SSM2602
Preliminary Technical Data
ALC CONTROL 2, ADDRESS 0x11
Table 38. ALC Control 2 Register Bit Map
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
DCY [3:0]
ATK [3:0]
Table 39. Descriptions of ALC Control 2 Register Bits
Bit Name
Description
Settings
DCY [3:0]
Decay (release) time control
0000: 24 ms
0001: 48 ms
0010: 96 ms
0011: 192 ms (default)
… 24 ms steps up to
1010: 24.576 sec
0000: 6 ms
ATK [3:0]
ALC attack time control
0001: 12 ms
0010: 24 ms (default)
… 6 ms steps up to
1010: 6.144 sec
NOISE GATE, ADDRESS 0x12
Table 40. Noise Gate Register Bit Map
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
NGTH [4:0]
NGG [1:0]
NGAT
Table 41. Descriptions of Noise Gate Register Bits
Bit Name
Description
Settings
NGTH [4:0]
Noise gate threshold
00000: −76.5 dBFS (default)
00001: −75 dBFS
… 1.5 dB steps up to
11110: −31.5 dBFS
11111: −30 dBFS
NGG [1:0]
Noise gate type
Noise enable
X0: hold PGA gain constant (default)1
01: mute output
11: reserved
NGAT
0: noise disable (default)
1: noise enable
1 X = don’t care.
Rev. PrB | Page 26 of 28