SR6G7x
Data brief
Stellar SR6 G7 line — 32-bit Arm® Cortex®‑R52+ automotive integration MCU
6x Cortex®‑R52+ cores, 20.5 MB NVM (2x 19.5 MB “OTA X2”)
9.1 MB RAM, with embedded virtualization, safety and security
Features
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AEC-Q100 automotive qualification on going
SR6 integration MCUs:
FPBGA 476
(21.3 x 21.3 mm)
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Have superior real-time and safe performance (with highest ASIL-D
capability)
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Bring HW based virtualization technology to MCUs for simplified multiple
SW integrations at optimized performance
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FPBGA 292
(17 x 17 mm)
Have built-in fast and cost effective OTA reprogramming capability (with
built-in dual image storage)
Offer high speed security cryptographic services, for example for network
authentication
Cores
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32-bit Arm® v8-R compliant CPU cores:
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6 Cortex®‑R52+ cores (4 of them with checker cores, 2 in split-lock
configuration) allowing usage as either 6 cores (4 of them in lockstep
configuration) or 5 cores (all of them in lockstep configuration), single
precision FPU, new privilege level for real-time virtualization
Part number
Package
FPBGA 476
FPBGA 292
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2 NEON extensions (for example SIMD, dual precision FPU)
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2 Cortex®‑M4 multipurpose accelerators (data move and [pre]-processing). Both
SR6G7C6
SR6G7C4
in lockstep configuration
4 eDMA engines in lockstep configuration
Memories
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Up to 20.5 MB on-chip NVM non-volatile memory:
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PCM (phase change memory) as non-volatile memory
19.5 MB code NVM, with embedded memory replication for OTA (over-the-
air) reprogramming with up to 2x 19.5 MB
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1024 KB HSM dedicated code NVM
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640 KB data NVM (512 KB + 128 KB dedicated to HSM)
Up to 9280 KB on-chip general-purpose SRAM
DB4507 - Rev 5 - September 2022
For further information contact your local STMicroelectronics sales office.
www.st.com