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SN74LV04ATPWRQ1 PDF预览

SN74LV04ATPWRQ1

更新时间: 2024-02-04 11:20:57
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
10页 199K
描述
HEX INVERTER

SN74LV04ATPWRQ1 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP14,.25针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.22
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G14
长度:5 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.006 A
功能数量:6输入次数:1
端子数量:14最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 VProp。Delay @ Nom-Sup:12 ns
传播延迟(tpd):18 ns认证状态:Not Qualified
施密特触发器:NO筛选级别:AEC-Q100
座面最大高度:1.2 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

SN74LV04ATPWRQ1 数据手册

 浏览型号SN74LV04ATPWRQ1的Datasheet PDF文件第2页浏览型号SN74LV04ATPWRQ1的Datasheet PDF文件第3页浏览型号SN74LV04ATPWRQ1的Datasheet PDF文件第4页浏览型号SN74LV04ATPWRQ1的Datasheet PDF文件第5页浏览型号SN74LV04ATPWRQ1的Datasheet PDF文件第6页浏览型号SN74LV04ATPWRQ1的Datasheet PDF文件第7页 
SN74LV04A-Q1  
HEX INVERTER  
SCLS514C − JULY 2003 − REVISED FEBRUARY 2008  
PW PACKAGE  
(TOP VIEW)  
D
D
Qualified for Automotive Applications  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1A  
1Y  
2A  
2Y  
3A  
VCC  
13 6A  
1
2
3
4
5
6
7
14  
D
D
D
D
D
D
2-V to 5.5-V V Operation  
CC  
12  
11  
10  
9
6Y  
5A  
5Y  
4A  
4Y  
Max t of 6.5 ns at 5 V  
pd  
Typical V  
(Output Ground Bounce)  
OLP  
<0.8 V at V = 3.3 V, T = 25°C  
3Y  
GND  
CC  
A
8
Typical V  
(Output V Undershoot)  
OHV  
OH  
>2.3 V at V = 3.3 V, T = 25°C  
CC  
A
Support Mixed-Mode Voltage Operation on  
All Ports  
I
off  
Supports Partial-Power-Down Mode  
Operation  
description/ordering information  
This hex inverter is designed for 2-V to 5.5-V V operation.  
CC  
The SN74LV04A contains six independent inverters. This device performs the Boolean function Y = A.  
The device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
PACKAGE  
TSSOP − PW  
A
−40°C to 105°C  
Tape and reel SN74LV04ATPWRQ1  
LV04AT  
For the most current package and ordering information, see the Package Option Addendum at the end  
of this document, or see the TI web site at http://www.ti.com.  
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
FUNCTION TABLE  
(each inverter)  
INPUT  
A
OUTPUT  
Y
H
L
L
H
logic diagram, each inverter (positive logic)  
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2008, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LV04ATPWRQ1 替代型号

型号 品牌 替代类型 描述 数据表
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