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SN74LV04ATPWREP PDF预览

SN74LV04ATPWREP

更新时间: 2024-11-02 12:21:51
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
11页 508K
描述
HEX INVERTER

SN74LV04ATPWREP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:GREEN, PLASTIC, TSSOP-14针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.83Is Samacsys:N
系列:LV/LV-A/LVX/HJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:5 mm
负载电容(CL):50 pF逻辑集成电路类型:INVERTER
最大I(ol):0.05 A湿度敏感等级:1
功能数量:6输入次数:1
端子数量:14最高工作温度:105 °C
最低工作温度:-40 °C输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):0.02 mAProp。Delay @ Nom-Sup:12 ns
传播延迟(tpd):18 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.2 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

SN74LV04ATPWREP 数据手册

 浏览型号SN74LV04ATPWREP的Datasheet PDF文件第2页浏览型号SN74LV04ATPWREP的Datasheet PDF文件第3页浏览型号SN74LV04ATPWREP的Datasheet PDF文件第4页浏览型号SN74LV04ATPWREP的Datasheet PDF文件第5页浏览型号SN74LV04ATPWREP的Datasheet PDF文件第6页浏览型号SN74LV04ATPWREP的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢃ ꢇꢈ ꢉꢊ  
ꢋꢉꢌ ꢍꢁ ꢅꢉ ꢎ ꢏꢉ ꢎ  
SCLS563A − JANUARY 2004 − REVISED MAY 2004  
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
D
D
D
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC A  
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
OH  
D
D
Extended Temperature Performance of  
−40°C to 105°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
= 3.3 V, T = 25°C  
CC A  
Supports Mixed-Mode Voltage Operation on  
All Ports  
I
Supports Partial-Power-Down Mode  
off  
D
D
D
D
Enhanced Product-Change Notification  
Operation  
Qualification Pedigree  
PW PACKAGE  
(TOP VIEW)  
2-V to 5.5-V V  
Operation  
CC  
Max t of 7.5 ns at 5 V  
pd  
1A  
1Y  
2A  
2Y  
3A  
3Y  
V
CC  
13 6A  
1
2
3
4
5
6
7
14  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
12  
11  
10  
9
6Y  
5A  
5Y  
4A  
4Y  
8
GND  
description/ordering information  
This hex inverter is designed for 2-V to 5.5-V V  
operation.  
CC  
The SN74LV04A contains six independent inverters. This device performs the Boolean function Y = A.  
The device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
PACKAGE  
TSSOP − PW  
A
−40°C to 105°C  
Tape and reel SN74LV04ATPWREP  
LV04AEP  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each inverter)  
INPUT  
A
OUTPUT  
Y
H
L
L
H
logic diagram, each inverter (positive logic)  
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢏꢟ  
Copyright 2004, Texas Instruments Incorporated  
ꢛ ꢟ ꢜ ꢛꢔ ꢕꢩ ꢗꢖ ꢚ ꢢꢢ ꢠꢚ ꢘ ꢚ ꢙ ꢟ ꢛ ꢟ ꢘ ꢜ ꢤ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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