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SN74HC645N-10 PDF预览

SN74HC645N-10

更新时间: 2024-11-26 14:44:51
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
15页 718K
描述
HC/UH SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDIP20

SN74HC645N-10 技术参数

生命周期:Obsolete包装说明:DIP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.27其他特性:WITH DIRECTION CONTROL
系列:HC/UHJESD-30 代码:R-PDIP-T20
长度:24.325 mm负载电容(CL):150 pF
逻辑集成电路类型:BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE传播延迟(tpd):34 ns
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:CMOS温度等级:INDUSTRIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL宽度:7.62 mm
Base Number Matches:1

SN74HC645N-10 数据手册

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ꢉ ꢅꢊꢋꢌ ꢍꢎꢀ ꢊ ꢏꢋꢁꢀꢅ ꢐ ꢑꢒ ꢐ ꢏ  
SCLS304B – JANUARY 1996 – REVISED DECEMBER 2002  
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
D
D
D
D
Typical t = 12 ns  
pd  
±6-mA Output Drive at 5 V  
High-Current 3-State Outputs Can Drive Up  
To 15 LSTTL Loads  
Low Input Current of 1 µA Max  
Low Power Consumption, 80-µA Max I  
CC  
True Logic  
SN54HC645 . . . FK PACKAGE  
(TOP VIEW)  
SN54HC645 . . . J OR W PACKAGE  
SN74HC645 . . . DW, N, OR NS PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
3
2
1
20 19  
18  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
B1  
B2  
B3  
B4  
B5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
GND  
description/ordering information  
These octal bus transceivers are designed for asynchronous two-way communication between data buses.  
These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending upon the  
level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the  
buses are effectively isolated.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP – N  
Tube  
SN74HC645N  
SN74HC645N  
Tube  
SN74HC645DW  
SN74HC645DWR  
SN74HC645NSR  
SNJ54HC645J  
SNJ54HC645W  
SNJ54HC645FK  
–40°C to 85°C  
SOIC – DW  
HC645  
Tape and reel  
Tape and reel  
Tube  
SOP – NS  
CDIP – J  
HC645  
SNJ54HC645J  
SNJ54HC645W  
SNJ54HC645FK  
–55°C to 125°C  
CFP – W  
LCCC – FK  
Tube  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
FUNCTION TABLE  
INPUTS  
OPERATION  
OE  
L
DIR  
L
B data to A bus  
A data to B bus  
Isolation  
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
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ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
ꢢ ꢙꢦ ꢣꢠꢠ ꢛ ꢟꢩꢣ ꢜ ꢫꢘ ꢠꢣ ꢙ ꢛꢟꢣ ꢧꢨ ꢉ ꢙ ꢞꢦ ꢦ ꢛ ꢟꢩꢣ ꢜ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢠ ꢇ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛ ꢙ  
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1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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