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ꢃ ꢉꢋꢌ ꢍ ꢀꢎ ꢁꢅꢄꢏꢐ ꢁꢐ ꢑꢀ ꢑꢒ ꢓꢔꢐ ꢕ ꢁ ꢅꢐ ꢑ ꢁꢍ ꢖꢏ
ꢗꢔꢑꢘ ꢙ ꢅꢙ ꢐ ꢅꢚ ꢕ ꢌꢍꢄ ꢅ ꢙꢖ ꢘꢏ ꢛ
SCLS594A − NOVEMBER 2004 − REVISED APRIL 2008
D
D
D
D
D
D
D
D
Qualified for Automotive Applications
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
D
D
D
Fully Synchronous in Count Modes
Parallel Asynchronous Load for Modulo-N
Count Lengths
Asynchronous Clear
Low Power Consumption, 80-µA Max I
CC
Typical t = 20 ns
pd
4-mA Output Drive at 5 V
PW PACKAGE
(TOP VIEW)
Low Input Current of 1 µA Max
Look-Ahead Circuitry Enhances Cascaded
Counters
B
V
A
1
2
3
4
5
6
7
8
16
15
14
13
CC
Q
B
A
Q
CLR
BO
description/ordering information
DOWN
UP
12 CO
The SN74HC193 device is a 4-bit synchronous,
reversible, up/down binary counter. Synchronous
operation is provided by having all flip-flops clocked
simultaneously so that the outputs change
simultaneously with each other when dictated by the
steering logic. This mode of operation eliminates the
output counting spikes normally associated with
asynchronous (ripple-clock) counters.
11
10
9
Q
Q
LOAD
C
D
C
D
GND
The outputs of the four flip-flops are triggered on a low-to-high-level transition of either count (clock) input (UP
or DOWN). The direction of counting is determined by which count input is pulsed while the other count input
is high.
All four counters are fully programmable; that is, each output may be preset to either level by placing a low on
the load (LOAD) input and entering the desired data at the data inputs. The output changes to agree with the
data inputs independently of the count pulses. This feature allows the counters to be used as modulo-N dividers
simply by modifying the count length with the preset inputs.
A clear (CLR) input has been provided that forces all outputs to the low level when a high level is applied. The
clear function is independent of the count and LOAD inputs.
This counter was designed to be cascaded without the need for external circuitry. The borrow (BO) output
produces a low-level pulse while the count is zero (all outputs low) and DOWN is low. Similarly, the carry (CO)
output produces a low-level pulse while the count is maximum (9 or 15), and UP is low. The counter then can
be cascaded easily by feeding BO and CO to DOWN and UP, respectively, of the succeeding counter.
{
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
‡
PACKAGE
T
A
−40°C to 125°C
−40°C to 85°C
TSSOP − PW
TSSOP − PW
Reel of 2000
Reel of 2000
SN74HC193QPWRQ1
SN74HC193IPWRQ1
HC193Q
HC193I
†
For the most current package and ordering information, see the Package Option Addendum at the end of
this document, or see the TI web site at http://www.ti.com.
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.
‡
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2008, Texas Instruments Incorporated
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