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SN74AS856NT3 PDF预览

SN74AS856NT3

更新时间: 2024-10-01 15:52:11
品牌 Logo 应用领域
德州仪器 - TI 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
9页 125K
描述
AS SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDIP24

SN74AS856NT3 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DIP,Reach Compliance Code:not_compliant
风险等级:5.92其他特性:EIGHT SELECTABLE MODES; READ BACK; SERIAL SHIFT IN DATA FOR SCAN
系列:ASJESD-30 代码:R-PDIP-T24
长度:31.64 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:24最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
最大电源电流(ICC):200 mA传播延迟(tpd):11 ns
认证状态:Not Qualified座面最大高度:5.08 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:COMMERCIAL
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7.62 mmBase Number Matches:1

SN74AS856NT3 数据手册

 浏览型号SN74AS856NT3的Datasheet PDF文件第2页浏览型号SN74AS856NT3的Datasheet PDF文件第3页浏览型号SN74AS856NT3的Datasheet PDF文件第4页浏览型号SN74AS856NT3的Datasheet PDF文件第5页浏览型号SN74AS856NT3的Datasheet PDF文件第6页浏览型号SN74AS856NT3的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢀ ꢅ ꢂ ꢆꢇ ꢈꢀ ꢁꢉ ꢃꢄ ꢀ ꢅꢂ ꢆ  
ꢅ ꢊꢋꢌ ꢍ ꢈꢎꢁꢌ ꢏꢐꢑ ꢀꢄꢒꢈꢍ ꢑꢄ ꢁꢀꢓꢐ ꢌꢏꢐ ꢑꢈ ꢔꢕ ꢑꢍ ꢈꢓꢕ ꢁꢍ ꢑꢕ ꢒꢒ ꢐ ꢑꢀ  
SDAS032A − DECEMBER 1983 − REVISED MARCH 1985  
SN54AS856 . . . JT PACKAGE  
Package Options Include Plastic Small  
Outline Packages, Both Plastic and  
Ceramic Chip Carriers, and Standard  
Plastic and Ceramic 300-mil DIPs  
SN74AS856 . . . DW OR NT PACKAGE  
(TOP VIEW)  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
OEB  
OEA  
MODE  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
V
CC  
Buffered 3-State Outputs Drive Bus Lines  
2
CLK  
SERIN  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
Directly  
3
Cascadable to n-Bits  
4
Eight Selectable Transceiver/Port  
5
Functions:  
6
− B to A  
7
− Register to A and/or B  
− Off-Line Shifts (A and B Ports in  
High-Impedance State)  
− Shifted to A and/or B  
8
9
10  
11  
12  
B8  
Q8  
Particularly Suitable for Use in Diagnostics  
Analysis Circuitry  
SN54AS856 . . . FK PACKAGE  
SN74AS856 . . . FN PACKAGE  
Serial Register Provides:  
− Parallel Storage of Either A or B input  
Data  
(TOP VIEW)  
− Serial Transmission of Data from Either  
A or B Port  
− Readback Mode B to A  
4
3
2 1 28 27 26  
Dependable Texas Instruments Quality and  
5
6
7
8
9
25 B1  
A1  
Reliability  
24  
23  
22  
21  
20  
19  
B2  
B3  
NC  
B4  
B5  
B6  
A2  
A3  
NC  
A4  
A5  
A6  
description  
The ’AS856 features two 8-bit I/O ports (A1-A8  
and B1-B8), an 8-bit parallel-load, serial-in,  
parallel-out shift register, and control logic. With  
these features, this device is capable of  
performing eight selectable transceiver or port  
functions, depending on the state of the three  
control lines OEA, OEB, and MODE. These  
functions include: transferring data from port A to  
port B or vice versa (i.e., the transceiver function),  
serial shifting data to either or both ports, and  
performing off-line shifts (with A and B ports active  
as transceivers in a high-impedance state).  
10  
11  
12 13 14 15 16 17 18  
NC − No internal connection  
Synchronous parallel loading of the internal register can be accomplished from either port on the positive  
transition of the clock while serially shifting data in via the SERIN input. The ’AS856 is ideally suited for  
applications needing signature-analysis circuitry to enhance system verification and/or fault analysis. All serial  
data is shifted right. All outputs are buffer-type outputs designed specifically to drive bus lines directly and all  
are 3-state except for Q8, which is a totem-pole output.  
The SN54AS856 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74AS856 is characterized for operation from 0°C to 70°C.  
ꢍꢣ  
Copyright 1985, Texas Instruments Incorporated  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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