5秒后页面跳转
SN74ALS746-1DWR PDF预览

SN74ALS746-1DWR

更新时间: 2024-01-12 07:36:54
品牌 Logo 应用领域
德州仪器 - TI 驱动输入元件光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
8页 213K
描述
ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20

SN74ALS746-1DWR 技术参数

生命周期:Obsolete包装说明:SOP,
Reach Compliance Code:unknown风险等级:5.77
其他特性:WITH DUAL OUTPUT ENABLE; WITH INPUT PULL-UP系列:ALS
JESD-30 代码:R-PDSO-G20长度:12.8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
最大电源电流(ICC):22 mA传播延迟(tpd):9 ns
认证状态:Not Qualified座面最大高度:2.65 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
Base Number Matches:1

SN74ALS746-1DWR 数据手册

 浏览型号SN74ALS746-1DWR的Datasheet PDF文件第2页浏览型号SN74ALS746-1DWR的Datasheet PDF文件第3页浏览型号SN74ALS746-1DWR的Datasheet PDF文件第4页浏览型号SN74ALS746-1DWR的Datasheet PDF文件第5页浏览型号SN74ALS746-1DWR的Datasheet PDF文件第6页浏览型号SN74ALS746-1DWR的Datasheet PDF文件第7页 
ꢀꢁ ꢂꢃ ꢄꢅ ꢀꢂ ꢃꢆ  
ꢇ ꢈꢉꢄꢅꢊꢋ ꢌꢍ ꢍꢎ ꢏꢊꢄꢁꢐ ꢊꢅ ꢑꢁ ꢎꢊ ꢐ ꢏꢑ ꢒ ꢎꢏ  
ꢓ ꢑꢉ ꢔꢊ ꢑꢁꢕ ꢌꢉ ꢊꢕꢌ ꢅꢅ ꢌꢕꢊꢏ ꢎꢀ ꢑꢀ ꢉꢇ ꢏꢀ  
SDAS052A − AUGUST 1984 − REVISED JANUARY 1995  
DW OR N PACKAGE  
(TOP VIEW)  
3-State Outputs Drive Bus Lines or Buffer  
Memory Address Registers  
Input Pullup Resistors Added for Data-Bus  
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
OE2  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
Termination  
Data Flow-Through Pinout (All Inputs on  
Y1  
Y2  
Y3  
Y4  
Opposite Side From Outputs)  
Package Options Include Plastic  
Small-Outline (DW) Packages and Standard  
Plastic (N) 300-mil DIPs  
Y5  
13 Y6  
12 Y7  
description  
11  
GND  
Y8  
This octal buffer and line driver is designed to have  
the performance of the ALS240A and, at the  
same time, offers a pinout with inputs and outputs  
on opposite sides of the package. This arrangement facilitates printed-circuit-board layout. In addition, 20-kΩ  
resistors have been added between all inputs and V . This eliminates adding external resistors in applications  
CC  
where the data bus must be at a high level when all other connecting devices are at a high-impedance state.  
The 3-state control gate is a 2-input NOR such that if either output-enable (OE1 or OE2) input is high, all eight  
outputs are in the high-impedance state.  
The SN74ALS746 provides inverted data at the outputs.  
The SN74ALS746 is characterized for operation from 0°C to 70°C.  
logic symbol  
logic diagram (positive logic)  
1
1
&
OE1  
OE1  
OE2  
19  
EN  
19  
OE2  
20  
V
CC  
2
3
4
5
6
7
8
9
18  
17  
16  
15  
14  
13  
12  
11  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
18  
2
Y1  
A1  
To Seven Other Channels  
All input pullup resistors are 20 k.  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
ꢉꢡ  
Copyright 1995, Texas Instruments Incorporated  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

与SN74ALS746-1DWR相关器件

型号 品牌 获取价格 描述 数据表
SN74ALS746-1N TI

获取价格

ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20
SN74ALS746-1N ROCHESTER

获取价格

ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20
SN74ALS746-1N3 TI

获取价格

ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20
SN74ALS746-1NP3 TI

获取价格

IC IC,BUFFER/DRIVER,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,PLASTIC, Bus Driver/Transceiver
SN74ALS746DW TI

获取价格

OCTAL BUFFERS AND LINE DRIVERS WITH INPUT PULL-UP RESISTORS
SN74ALS746DWP3 TI

获取价格

IC,BUFFER/DRIVER,SINGLE,8-BIT,ALS-TTL,SOP,20PIN,PLASTIC
SN74ALS746DWR TI

获取价格

暂无描述
SN74ALS746N TI

获取价格

Octal Buffers/Line Drivers With Input Pull-Up Resistors 20-PDIP 0 to 70
SN74ALS746N3 TI

获取价格

ALS SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDIP20
SN74ALS746NP3 TI

获取价格

IC,BUFFER/DRIVER,SINGLE,8-BIT,ALS-TTL,DIP,20PIN,PLASTIC