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SN65HVD53 PDF预览

SN65HVD53

更新时间: 2024-01-22 21:42:47
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
23页 1502K
描述
HIGH OUTPUT FULL-DUPLEX RS-485 DRIVERS AND RECEIVERS

SN65HVD53 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.25
其他特性:SIGNALING RATE 25 MBPS差分输出:YES
驱动器位数:1高电平输入电流最大值:0.0001 A
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE TRANSCEIVER
接口标准:EIA-485-A; TIA-485-AJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
湿度敏感等级:1功能数量:1
端子数量:14最高工作温度:85 °C
最低工作温度:-40 °C最小输出摆幅:1.7 V
输出特性:3-STATE最大输出低电流:0.008 A
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified最大接收延迟:40 ns
接收器位数:1座面最大高度:1.75 mm
子类别:Line Driver or Receivers最大压摆率:2.7 mA
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V电源电压1-最大:5.5 V
电源电压1-分钟:4.5 V电源电压1-Nom:5 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
最大传输延迟:12 ns宽度:3.9 mm
Base Number Matches:1

SN65HVD53 数据手册

 浏览型号SN65HVD53的Datasheet PDF文件第6页浏览型号SN65HVD53的Datasheet PDF文件第7页浏览型号SN65HVD53的Datasheet PDF文件第8页浏览型号SN65HVD53的Datasheet PDF文件第10页浏览型号SN65HVD53的Datasheet PDF文件第11页浏览型号SN65HVD53的Datasheet PDF文件第12页 
SN65HVD50-SN65HVD55  
SN65HVD56-SN65HVD59  
www.ti.com  
SLLS666SEPTEMBER 2005  
THERMAL CHARACTERISTICS  
over operating free-air temperature range unless otherwise noted(1)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP MAX UNIT  
Low-K board(3), No airflow  
HVD50, HVD51, HVD52, HVD56, HVD57  
HVD53, HVD54, HVD55, HVD58, HVD59  
HVD50, HVD51, HVD52, HVD56, HVD57  
HVD53, HVD54, HVD55, HVD58, HVD59  
HVD50, HVD51, HVD52, HVD56, HVD57  
HVD53, HVD54, HVD55, HVD58, HVD59  
HVD50, HVD51, HVD52, HVD56, HVD57  
HVD53, HVD54, HVD55, HVD58, HVD59  
HVD50, HVD56 (25Mbps)  
230.8  
162.6  
135.1  
Junction–to–ambient  
thermal resistance(2)  
θJA  
High-K board(4), No airflow  
Junction–to–ambient  
thermal resistance(2)  
92.1  
°C/W  
44.4  
Junction–to–board  
thermal resistance  
θJB  
High-K board  
No board  
61.1  
43.5  
58.6  
420  
404  
383  
Junction–to–case  
thermal resistance  
θJC  
RL= 60, CL = 50 pF,  
Input to D a 50% duty cycle  
square wave at indicated  
signaling rate  
HVD51, HVD57 (10Mbps)  
HVD52 (1Mbps)  
Device power  
dissipation  
PD  
mW  
RL= 60, CL = 50 pF,  
DE at VCCRE at 0 V,  
Input to D a 50% duty cycle  
square wave at indicated  
signaling rate  
HVD53, HVD58 (25Mbps)  
420  
404  
383  
HVD54, HVD59 (10Mbps)  
HVD55 (1Mbps)  
Low-K board, No airflow  
HVD50, HVD56  
–40  
–40  
–40  
–40  
–40  
55  
84  
85  
85  
85  
HVD51, HVD52, HVD57  
Ambient air  
temperature  
TA  
HVD53, HVD54, HVD55, HVD58, HVD59  
HVD50, HVD51, HVD52, HVD56, HVD57  
HVD53, HVD54, HVD55, HVD58, HVD59  
°C  
High-K board, No airflow  
TJSD Thermal shutdown junction temperature  
165  
(1) See Application Information section for an explanation of these parameters.  
(2) The intent of θJA specification is solely for a thermal performance comparison of one package to another in a standardized environment.  
This methodology is not meant to and will not predict the performance of a package in an application-specific environment.  
(3) In accordance with the Low-K thermal metric definitions of EIA/JESD51-3.  
(4) In accordance with the High-K thermal metric definitions of EIA/JESD51-7.  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
375 ±1%  
V
CC  
I
Y
DE  
I
I
DE  
Y
Y
D
V
OD  
R
0 or 3 V  
L
V
OD  
60 ±1%  
0 or 3 V  
+
Z
I
Z
7 V < V  
< 12 V  
(test)  
Z
_
V
I
375 ±1%  
V
Z
V
Y
Figure 1. Driver VOD Test Circuit: Voltage and Current  
Definitions  
Figure 2. Driver VOD With Common-Mode Loading Test  
Circuit  
9

SN65HVD53 替代型号

型号 品牌 替代类型 描述 数据表
SN65HVD53 TI

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