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SMH4811A_09 PDF预览

SMH4811A_09

更新时间: 2022-05-07 08:47:33
品牌 Logo 应用领域
SUMMIT 控制器
页数 文件大小 规格书
15页 936K
描述
Programmable Distributed Power Hot-Swap Controller for High-Availability Systems

SMH4811A_09 数据手册

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SMH4811A  
Preliminary  
ABSOLUTE MAXIMUM RATINGS*  
Temperature Under Bias ...................... –55°C to 125°C  
StorageTemperature .............................. –65°Cto150°C  
LeadSolderTemperature(10secs) ..................... 300°C  
RECOMMENDED OPERATING CONDITIONS  
Temperature Range (Ambient)  
-40o C to +85o C  
Supply Voltage . (V ) (I = 5 mA)  
11V to 13V  
DD  
DD  
o
Package Thermal Resistance (θ ) 16-pin SOIC  
46 C/W  
JA  
Terminal Voltage with Respect to VSS  
:
VDD ................................. –0.5V to VDD  
OV, UV, DRAIN SENSE,  
Moisture Classification Level 1 (MSL 1) per J-STD-020  
Reliability Characteristics  
CBSENSE........... –0.5V to VDD+0.5V  
PD1#, PD2#, ENPG, EN/TS ......... 10V  
FAULT#, PG# ........ –0.5V to VDD+0.5V  
VGATE................................. VDD+0.5V  
Data Retention .........................................................100 Years  
1
Endurance ....................................................100,000 Cycles  
StresseslistedunderAbsoluteMaximumRatingsmaycausepermanentdamagetothedevice. These  
arestressratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsoutside  
thoselistedintheoperationalsectionsofthisspecificationisnotimplied. Exposuretoanyabsolute  
maximumratingforextendedperiodsmayaffectdeviceperformanceandreliability.  
AC OPERATING CHARACTERISTICS  
Symbol  
Description  
Min.  
Typ.  
400  
150  
50 *  
5
Max.  
Units  
µs  
µs  
tCBD  
50mV Circuit Breaker Delay (filter)  
µs  
µs  
50  
µs  
250  
500  
1.5  
5 *  
µs  
µs  
ms  
ms  
ms  
ms  
ms  
ns  
tPGD  
Programmable Power Good Delay  
20  
80  
160  
200  
2.5 *  
Off *  
5
tFSTSHTDN Fast Shut Down delay from fault to VGATE off  
tCYC  
Circuit breaker cycle mode time  
s
ms  
ms  
ms  
ms  
ms  
ms  
tPUVF  
Programmable Under-Voltage filter  
80  
160  
0.5  
5
tPDD  
Programmable Pin Detect Delay  
80 *  
160  
ms  
2044 Prog Table  
Note: * Indicates default value  
Note (1) Guaranteed by Design  
4
SUMMIT MICROELECTRONICS, Inc.  
2044 6.6 03/27/09  

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