Datasheet > SM74101X/NOPB

SM74101X/NOPB

更新时间： 2022-12-01 22:08:28

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
12页	682K
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SM74101X/NOPB

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SM74101X/NOPB 数据手册

Simplified Application Block Diagram

20066803

FIGURE 2. Simplified Application Block Diagram

vide the option of single supply or split supply configurations.

When driving the MOSFET gates from a single positive

supply, the IN_REF and V_EEpins are both connected to the

power ground.

Detailed Operating Description

The LM5112 is a high speed , high peak current (7A) single

channel MOSFET driver. The high peak output current of the

LM5112 will switch power MOSFET’s on and off with short

rise and fall times, thereby reducing switching losses con-

siderably. The LM5112 includes both inverting and non-

inverting inputs that give the user flexibility to drive the

MOSFET with either active low or active high logic signals.

The driver output stage consists of a compound structure

with MOS and bipolar transistor operating in parallel to opti-

mize current capability over a wide output voltage and oper-

ating temperature range. The bipolar device provides high

peak current at the critical Miller plateau region of the MOS-

FET V_GS, while the MOS device provides rail-to-rail output

swing. The totem pole output drives the MOSFET gate be-

tween the gate drive supply voltage V_CCand the power

ground potential at the V_EEpin.

The isolated input and output stage grounds provide the

capability to drive the MOSFET to a negative V_GSvoltage for

a more robust and reliable off state. In split supply configu-

ration, the IN_REF pin is connected to the ground of the

controller which drives the LM5112 inputs. The V_EEpin is

connected to a negative bias supply that can range from the

IN_REF potential to as low as 14 V below the Vcc gate drive

supply. For reliable operation, the maximum voltage differ-

ence between V_CCand IN_REF or between V_CCand V_EEis

14V.

The minimum recommended operating voltage between Vcc

and IN_REF is 3.5V. An Under Voltage Lock Out (UVLO)

circuit is included in the LM5112 which senses the voltage

difference between V_CCand the input ground pin, IN_REF.

When the V_CCto IN_REF voltage difference falls below 2.8V

the driver is disabled and the output pin is held in the low

state. The UVLO hysteresis prevents chattering during

The control inputs of the driver are high impedance CMOS

buffers with TTL compatible threshold voltages. The nega-

tive supply of the input buffer is connected to the input

ground pin IN_REF. An internal level shifting circuit connects

the logic input buffers to the totem pole output drivers. The

level shift circuit and separate input/output ground pins pro-

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与SM74101X/NOPB相关器件

型号	品牌	获取价格	描述	数据表
SM74102/NOPB	TI	获取价格	SM74102/NOPB
SM74102E/NOPB	TI	获取价格	SM74102E/NOPB
SM74102X/NOPB	TI	获取价格	SM74102X/NOPB
SM74103E/NOPB	TI	获取价格	SM74103E/NOPB
SM74103X/NOPB	TI	获取价格	SM74103X/NOPB
SM74104	TI	获取价格	High Voltage Half-Bridge Gate Driver with Adaptive Delay
SM74104/NOPB	TI	获取价格	SM74104/NOPB
SM74104E/NOPB	TI	获取价格	SM74104E/NOPB
SM74104MA/NOPB	TI	获取价格	具有 8V UVLO 和自适应延迟的 1.8A、100V 半桥栅极驱动器 \| D \| 8
SM74104MAE/NOPB	TI	获取价格	IC,DUAL MOSFET DRIVER,SOP,8PIN,PLASTIC

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