SM5902AF
Pin description
Pin number
Pin name
I/O
Function
Setting
H
L
1
VDD2
UC1
-
Ip/O
Ip/O
Ip/O
Ip/O
Ip/O
O
VDD supply pin
Microcontroller interface extension I/O 1
Microcontroller interface extension I/O 2
Microcontroller interface extension I/O 3
Microcontroller interface extension I/O 4
Microcontroller interface extension I/O 5
Digital audio interface
2
3
UC2
4
UC3
5
UC4
6
UC5
7
DIT
8
NTEST
CLK
Ip
I
Test pin
Test
9
16.9344 MHz clock input
Ground
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
VSS
-
YSRDATA
YLRCK
YSCK
ZSCK
ZLRCK
ZSRDATA
YFLAG
YFCLK
YBLKCK
NRESET
ZSENSE
VDD1
YDMUTE
YMLD
YMDATA
YMCLK
A10
I
Audio serial input data
I
Audio serial input LR clock
Audio serial input bit clock
Audio serial output bit clock
Audio serial output LR clock
Audio serial output data
Signal processor IC RAM overflow flag
Crystal-controlled frame clock
Subcode block clock signal
System reset pin
Left channel Right channel
I
O
O
Left channel Right channel
Overflow
O
I
I
I
I
Reset
O
Microcontroller interface status output
VDD supply pin
-
I
Forced mute pin
Mute
I
Microcontroller interface latch clock
Microcontroller interface serial data
Microcontroller interface shift clock
DRAM address 10
I
I
O
(NCAS2)
NCAS
D2
O
DRAM2 CAS control (with 2 DRAMs)
DRAM CAS control
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
O
I/O
I/O
I/O
I/O
O
DRAM data input/output 2
DRAM data input/output 3
DRAM data input/output 0
DRAM data input/output 1
DRAM WE control
D3
D0
D1
NWE
NRAS
A9
O
DRAM RAS control
O
DRAM address 9
A8
O
DRAM address 8
A7
O
DRAM address 7
A6
O
DRAM address 6
A5
O
DRAM address 5
A4
O
DRAM address 4
A0
O
DRAM address 0
A1
O
DRAM address 1
A2
O
DRAM address 2
A3
O
DRAM address 3
Ip : Input pin with pull-up resistor Ip/O : Input/Output pin (With pull-up resistor when in input mode)
NIPPON PRECISION CIRCUITS-3