Datasheet > SLG59M1717V

SLG59M1717V

更新时间： 2023-12-20 18:45:48

品牌	Logo	应用领域
瑞萨 - RENESAS		/
页数	文件大小	规格书
26页	1000K
描述
GreenFET Single N-Channel Load Switch

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SLG59M1717V 数据手册

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SLG59M1717V

An Ultra-small, 4 mΩ, 5 A

Load Switch with PG Output

General Description

Pin Configuration

Operating from a 2.5 V to 5.5 V power supply and fully

specified over the -40 °C to 85 °C Industrial temperature

ON GND

range, the SLG59M1717V is a high-performance

4 mΩ, 5 A

CAP

VDD

single-channel nFET load switch designed for all 0.8 V to 5.5 V

power rail applications. The SLG59M1717V features

adjustable inrush current control which is achieved by

adjusting the V_OUTslew rate with an external capacitor. Using

a proprietary MOSFET design, the SLG59M1717V achieves a

16 15

RSET

VOUT

VIN

stable 4 mΩ RDS_ONacross a wide input/supply voltage range.

The SLG59M1717V also incorporates resistor-adjustable

current limiting as well as thermal protection. Using Renesas’s

proprietary CuFET™ technology for high-current operation,

the SLG59M1717V is packaged in a space-efficient, low

thermal resistance, RoHS-compliant 1.6 mm x 2.5 mm STQFN

package.

VIN VOUT

16-pin FC-STQFN

(Top View)

Features

•

Low Typical RDS_ONnFET Block: 4 mΩ

Maximum Continuous Switch Current: Up to 5 A

Supply Voltage: 2.5 V ≤ V_DD≤ 5.5 V

Wide Input Voltage Range: 0.8 V ≤ V_IN≤ V_DD

Capacitor adjustable Start-up and Inrush Current Control

Two-stage Overcurrent Protection:

Applications

•

Notebook Power Rail Switching

Tablet Power Rail Switching

Smartphone Power Rail Switching

• Resistor-adjustable Active Current Limit

• Fixed 1.6 A Short-circuit Current Limit

Thermal Shutdown Protection

•

Open-drain PG Signaling

Operating Temperature: -40 °C to 85 °C

Low θ_JA, 16-pin 1.6 mm x 2.5 mm STQFN

• Pb-Free / Halogen-Free / RoHS compliant

Block Diagram

5 A @ 4 mΩ

VIN

VOUT

C_IN

C_LOAD

2.5 V to 5.5 V

VDD

Linear Ramp

Control

Charge

Pump

CAP

RSET

ACL/SCL Detection &

Over Temperature

Protection

C_SLEW

R_SET

40 kΩ*

SW Closed

ON/OFF

CMOS Input

SW Open

* 40 kΩ sets a 5.7 A I_ACL

GND

Datasheet

3-Feb-2022

Revision 1.03

Page 1 of 25

CFR0011-120-01

12 3 4 5 6 7...26

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