SLG47502/03
Preliminary
Low Voltage GreenPAK Programmable
Mixed-Signal Matrix
Tables
Table 1: Functional Pin Description............................................................................................................................................9
Table 2: Pin Type Definitions ...................................................................................................................................................12
Table 3: Absolute Maximum Ratings........................................................................................................................................13
Table 4: Electrostatic Discharge Ratings .................................................................................................................................13
Table 5: Recommended Operating Conditions........................................................................................................................13
Table 6: EC at T = -40 °C to +85 °C, VDD = 1.1 V to 1.3 V Unless Otherwise Noted ..............................................................14
Table 7: EC of the I2C Pins for DI Mode at T = -40 °C to +85 °C, Full VDD Range Unless Otherwise Noted..........................16
Table 8: EC of the I2C Pins for DILV Mode at T = -40 °C to +85 °C, Full VDD Range Unless Otherwise Noted......................16
Table 9: I2C Pins Timing Characteristics for DI Mode, T = -40 °C to +85 °C, Full VDD Range Unless Otherwise Noted ........17
Table 10: I2C Pins Timing Characteristics for DILV Mode, T = -40 °C to +85 °C, Full VDD Range Unless Otherwise Noted..17
Table 11: Typical Current Estimated for Each Macrocell at T = 25 °C, VDD = 1.2 V ...............................................................18
Table 12: Typical Delay Estimated for Each Macrocell at T = 25 °C, VDD = 1.2 V...................................................................19
Table 13: Programmable Delay Expected Typical Delays and Pulse Widths at T = 25 °C, VDD = 1.2 V ...............................20
Table 14: Typical Filter Pulse Width, VDD = 1.2 V ...................................................................................................................21
Table 15: Typical Counter/Delay Offset at T = 25 °C, VDD = 1.2 V .........................................................................................21
Table 16: Oscillators Frequency Limits, VDD = 1.1 V to 1.3 V ................................................................................................21
Table 17: Oscillators Power-On Delay at T = 25 °C, VDD = 1.1 V to 1.3 V, OSC Power Setting: "Auto Power-On"................22
Table 18: ACMP Specifications at T = -40 °C to +85 °C, VDD = 1.1 V to 1.3 V Unless Otherwise Noted................................22
Table 19: Matrix Input Table.....................................................................................................................................................33
Table 20: Matrix Output Table..................................................................................................................................................35
Table 21: Connection Matrix Virtual Inputs ..............................................................................................................................38
Table 22: 2-bit LUT2_0 to 2-bit LUT2_2 Truth Table ...............................................................................................................44
Table 23: 2-bit LUT Standard Digital Functions .......................................................................................................................44
Table 24: 2-bit LUT2_3 Truth Table.........................................................................................................................................46
Table 25: 2-bit LUT Standard Digital Functions .......................................................................................................................46
Table 26: 3-bit LUT3_0 to 3-bit LUT3_9 Truth Table ...............................................................................................................56
Table 27: 3-bit LUT Standard Digital Functions .......................................................................................................................56
Table 28: 4-bit LUT0 Truth Table.............................................................................................................................................60
Table 29: 4-bit LUT Standard Digital Functions .......................................................................................................................61
Table 30: 3-bit LUT10 to 3-bit LUT16 Truth Table ...................................................................................................................70
Table 31: 4-bit LUT1 Truth Table.............................................................................................................................................73
Table 32: 4-bit LUT Standard Digital Functions .......................................................................................................................73
Table 33: ACMP Input Selection..............................................................................................................................................89
Table 34: Vref Selection Table.................................................................................................................................................95
Table 35: Oscillator Operation Mode Configuration Settings.................................................................................................100
Table 36: Read/Write Protection Options...............................................................................................................................118
Table 37: Register Map..........................................................................................................................................................121
Table 38: MSL Classification..................................................................................................................................................183
Datasheet
16-Jul-2021
Revision 2.0
6 of 191
CFR0011-120-00
© 2021 Dialog Semiconductor
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