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SL2304NZZC-1ZT PDF预览

SL2304NZZC-1ZT

更新时间: 2024-02-04 09:11:32
品牌 Logo 应用领域
SPECTRALINEAR 逻辑集成电路光电二极管驱动时钟
页数 文件大小 规格书
9页 137K
描述
Low Jitter and Skew DC to 160MHz Clock Buffer

SL2304NZZC-1ZT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:TSSOP-8针数:8
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.82Is Samacsys:N
系列:2304输入调节:STANDARD
JESD-30 代码:R-PDSO-G8长度:4.4 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:8
实输出次数:4最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED传播延迟(tpd):3.5 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.1 ns
座面最大高度:1.1 mm最大供电电压 (Vsup):3.63 V
最小供电电压 (Vsup):2.97 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mm最小 fmax:140 MHz
Base Number Matches:1

SL2304NZZC-1ZT 数据手册

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Preliminary  
SL2304NZ  
Low Jitter and Skew DC to 160MHz Clock Buffer  
Key Features  
Description  
The SL2304NZ is a low skew, jitter and power fanout  
Buffer designed to produce up to four (4) clock outputs  
from one (1) reference input clock, for high speed clock  
distribution, including PCI/PCI-X applications.  
x
x
x
x
x
DC to 160 MHz operating frequency range  
Low output clock skew: 50ps-typ  
Low part-to-part output skew: 90 ps-typ  
3.3V +/-10% operation supply voltage  
Low power dissipation:  
The SL2304NZ products operate from DC to 160MHz.  
The only difference between SL2304NZ-1 and SL2304NZ-  
1Z is the OE logic implementation. Refer to the Available  
OE Logic Configuration Table. 1  
x
x
x
- 7 mA-typ at 33MHz  
- 8 mA-typ at 66MHz  
- 12 mA-typ at 133MHz  
Refer to SL23EP04NZ products for DC to 220MHz-max  
frequency range, 2.5V to 3.3V power supply operation,  
improved skew, jitter and higher drive options.  
x
x
x
x
x
One input to four output fanout buffer drivers  
Output Enable (OE) control function  
Available in 8-pin TSSOP package  
Available in Commercial and Industrial grades  
Available in Lead (Pb) free package  
Benefits  
x
x
x
x
Up to four (4) distribution of input clock  
Low skew  
Applications  
Low Jitter  
Low power dissipation  
x
x
x
x
x
x
General Purpose PCI/PCI-X Clock Buffer  
Printers, MFPs and Digital Copiers  
PCs and Work Stations  
Routers, Switchers and Servers  
Datacom and Telecom  
High-Speed Digital Embeded Systems  
Block Diagram  
Rev 1.3, May 16, 2007  
Page 1 of 9  
2200 Laurelwood Road, Santa Clara, CA 95054 Tel: (408) 855-0555 Fax: (408) 855-0550 www.SpectraLinear.com  

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