Datasheet > SGM41512A

SGM41512A

更新时间： 2023-09-03 20:34:41

品牌	Logo	应用领域
圣邦微 - SGMICRO		电池
页数	文件大小	规格书
44页	1708K
描述
I2C Controlled 3A Single-Cell Battery Charger with High Input Voltage Capability and Narrow Voltage DC (NVDC) Power Path Management

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SGM41512A 数据手册

I²C Controlled 3A Single-Cell Battery Charger with High Input Voltage

Capability and Narrow Voltage DC (NVDC) Power Path Management

SGM41512A

TIMING REQUIREMENTS

(T_J= +25℃, unless otherwise noted.)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX UNITS

V_VBUS/V_BATPower-Up

V_VBUSrising above ACOV threshold to turn off

VBUS OVP Reaction Time

t_ACOV

0.1

µs

Wait Window for Bad Adapter Detection

Battery Charger

t_{BAD_SRC}

Deglitch Time for Charge Termination

Deglitch Time for Recharge

t_{TERM_DGL}

230

t_{RECHG_DGL}

System Over-Current Deglitch Time to Turn

off Q4

t_{SYSOVLD_DGL}

t_BATOVP

112

µs

Battery Over-Voltage Deglitch Time to

Disable Charge

Typical Charge Safety Timer Range

Typical Top-Off Timer Range

t_SAFETY

CHG_TIMER = 1

t_{TOP_OFF}

TOPOFF_TIMER[1:0] = 10 (30min)

min

nQON Timing and Ship Mode Timing

nQON Negative Pulse Low Pulse Width to

Turn on BATFET and Exit Ship Mode

t_SHIPMODE

0.9

1.2

nQON Low Time to Reset BATFET

BATFET off Time during Full System Reset

Wait Delay for Entering Ship Mode

Digital Clock and Watchdog Timer

Watchdog Reset Time

t_{QON_RST}

t_{BATFET_RST}

t_{SM_DLY}

300

200

250

12.5

t_WDT

f_LPDIG

f_DIG

WATCHDOG[1:0] = 01, REGN LDO disabled

REGN LDO disabled

Digital Clock Frequency in Low Power

kHz

Digital Clock Frequency

REGN LDO enabled

500

I²C Interface

SCL Clock Frequency

f_SCL

400

kHz

SG Micro Corp

www.sg-micro.com

JUNE 2022

1...6 7 8910 11 12...44

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